Unsticking Moore’s Law


Sanjay Natarajan, corporate vice president at Applied Materials with responsibility for transistor, interconnect and memory solutions, sat down with Semiconductor Engineering to talk about variation, Moore's Law, the impact of new materials such as cobalt, and different memory architectures and approaches. What follows are excerpts of that conversation. SE: Reliability is becoming more of an... » read more

Taming Concurrency


Concurrency adds complexity for which the industry lacks appropriate tools, and the problem has grown to the point where errors can creep into designs with no easy or consistent way to detect them. In the past, when chips were essentially a single pipeline, this wasn't a problem. In fact, the early pioneers of EDA created a suitable language to describe and contain the necessary concurrency ... » read more

What’s the Right Path For Scaling?


The growing challenges of traditional chip scaling at advanced nodes are prompting the industry to take a harder look at different options for future devices. Scaling is still on the list, with the industry laying plans for 5nm and beyond. But less conventional approaches are becoming more viable and gaining traction, as well, including advanced packaging and in-memory computing. Some option... » read more

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