tag: Moortec

The Growing Uncertainty Of Sign-Off At 7/5nm
By Ann Mutschler - 09 May, 2019 - Comments: 3

Having enough confidence in designs to sign off prior to manufacturing is becoming far more difficult at 7/5nm. It is taking longer due to increasing transistor density, thinner gate oxides, and many more power-related operations that can disrupt signal integrity and impact reliability.  For many years, designers have performed design rule checks as part of physical verification of the desi... » read more

Week In Review: Design, Low Power
By Jesse Allen - 03 May, 2019 - Comments: 0

ANSYS acquired the assets of DfR Solutions, a developer of automated design reliability analysis software. Founded in 2004 and based in Maryland, DfR's tool translates ECAD and MCAE data into 3D finite element models, automates thermal derating and performs thermal and mechanical analysis of electronics earlier in the design cycle. "ANSYS brings industry-leading electronic simulation capabiliti... » read more

Creating A Roadmap For Hardware Security
By Kevin Fogarty and Ed Sperling - 02 May, 2019 - Comments: 0

The U.S. Department of Defense and private industry consortiums are developing comprehensive and cohesive cybersecurity plans that will serve as blueprints for military, industrial and commercial systems. What is particularly noteworthy in all of these efforts is the focus on semiconductors. While software can be patched, vulnerabilities such as Spectre, Meltdown and Foreshadow need to be de... » read more

Low Power Meets Variability At 7/5nm
By Ann Mutschler - 11 Apr, 2019 - Comments: 0

Power-related issues are beginning to clash with process variation at 7/5nm, making timing closure more difficult and resulting in re-spins caused by unexpected errors and poor functional yield. Variability is becoming particularly troublesome at advanced nodes, and there are multiple causes of that variability. One of the key ones is the manufacturing process, which can be affected by every... » read more

New Approaches To Security
By Ed Sperling - 09 Apr, 2019 - Comments: 0

Different approaches are emerging to identify suspicious behavior and shut down potential breaches before they have a chance to do serious damage. This is becoming particularly important in markets where safety is an issue, and in AI and edge devices where the rapid movement of data is essential. These methods are a significant departure from the traditional way of securing devices through l... » read more

The Growing Challenge Of Thermal Guard-Banding
By Ann Mutschler - 18 Mar, 2019 - Comments: 1

Guard-banding for heat is becoming more difficult as chips are used across a variety of new and existing applications, forcing chipmakers to architect their way through increasingly complex interactions. Chips are designed to operate at certain temperatures, and it is common practice to develop designs with some margin to ensure correct functionality and performance throughout the operat... » read more

Using Less Power At The Same Node
By Brian Bailey - 14 Mar, 2019 - Comments: 0

Going to the next node has been the most effective way to reduce power, but that is no longer true or desirable for a growing percentage of the semiconductor industry. So the big question now is how to reduce power while maintaining the same node size. After understanding how the power is used, both chip designers and fabs have techniques available to reduce power consumption. Fabs are makin... » read more

Using AI Data For Security
By Ann Mutschler - 20 Feb, 2019 - Comments: 0

Artificial intelligence is migrating from the cloud to IoT edge devices. Now the question is how to apply that same technology to protect data and identify abnormal activity in those devices and the systems connected to them. This is a complex problem because AI is being used on multiple fronts in this battle, as well as for multiple purposes. The technology has advanced to the point where e... » read more

How To Reduce Thermal Guard-Banding
By Ramsay Allen - 14 Feb, 2019 - Comments: 0

Accuracy in temperature sensors can have a big impact in designs from 40nm down to 7nm and beyond, reducing the amount of guard-banding that is required, which in turn can lower the power and extend the life and reliability of components. But at these process geometries, not all sensors measure temperature equally. Thermal guard-banding is a very important consideration for design teams, and... » read more

Adapting Mobile To A Post-Moore’s Law Era
By Ann Mutschler - 14 Feb, 2019 - Comments: 0

The slowdown in Moore's Law is having a big impact on chips designed for the mobile market, where battery-powered devices need to still improve performance with lower power. This hasn't slowed down performance or power improvements, but it has forced chipmakers and systems companies to approach designs differently. And while feature shrinks will continue for the foreseeable future, they are ... » read more

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