tag: Movellus

Managing kW Power Budgets
By Ed Sperling - 17 Jul, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss increasing power demands and how to address it with Hans Yeager, senior principal engineer, architecture, at Tenstorrent; Joe Davis, senior director for Calibre interfaces and EM/IR product management at Siemens EDA; Mo Faisal, CEO of Movellus; Trey Roessig, CTO and senior vice president of engineering at Empower Semiconductor.... » read more

Chip Industry Week In Review
By The SE Staff - 21 Jun, 2024 - Comments: 0

BAE Systems and GlobalFoundries are teaming up to strengthen the supply of chips for national security programs, aligning technology roadmaps and collaborating on innovation and manufacturing. Focus areas include advanced packaging, GaN-on-silicon chips, silicon photonics, and advanced technology process development. Onsemi plans to build a $2 billion silicon carbide production plant in the ... » read more

Integrated, Turnkey Droop Response System: Heterogeneous IP Use Case
By Movellus - 29 May, 2024 - Comments: 0

Whether you serve the ADAS, PC, or networking market, chances are that your SoC is heterogeneous; containing general processors and application-specific accelerators. Your solution might have a systolic array for convolutions, a cluster of CPUs for application code, or a look-aside crypto engine for packet security. While application-specific accelerators significantly improve performance and p... » read more

Aeonic Generate GGM High Performance SoC Clock Generation Module
By Movellus - 24 Apr, 2024 - Comments: 0

Core counts have been increasing steadily since IBM's debut of the Power 4 in 2001, eclipsing 100 CPU cores and over 1,000 for AI accelerators. While sea of processor architectures feature a stamp and repeat design, per-core workloads aren't always going to be symmetrically balanced. For example, a cloud provider (AI or compute) will rent out individual core clusters to customers for specialize... » read more

Chip Industry Week In Review
By The SE Staff - 19 Apr, 2024 - Comments: 0

SK hynix and TSMC plan to collaborate on HBM4 development and next-generation packaging technology, with plans to mass produce HBM4 chips in 2026. The agreement is an early indicator for just how competitive, and potentially lucrative, the HBM market is becoming. SK hynix said the collaboration will enable breakthroughs in memory performance with increased density of the memory controller at t... » read more

Staying Within The Margins
By Barry Pangrle - 28 Mar, 2024 - Comments: 0

Last March I wrote an article called Squeezing the Margins that’s about a design that used an adaptive clocking scheme to keep the performance of a system high while simultaneously keeping the temperature below a specified maximum. Last August we looked at Managing Voltage Variation and how an adaptive clocking scheme could be used to manage dynamic voltage drop to maximize system performance... » read more

Sea Of Processors Use Case
By Movellus - 27 Mar, 2024 - Comments: 0

Core counts have been increasing steadily since IBM's debut of the Power 4 in 2001, eclipsing 100 CPU cores and over 1,000 for AI accelerators. While sea of processor architectures feature a stamp and repeat design, per-core workloads aren't always going to be symmetrically balanced. For example, a cloud provider (AI or compute) will rent out individual core clusters to customers for specialize... » read more

The Rising Price Of Power In Chips
By Ed Sperling - 14 Mar, 2024 - Comments: 0

Power is everything when it comes to processing and storing data, and much of it isn't good. Power-related issues, particularly heat, dominate chip and system designs today, and those issues are widening and multiplying. Transistor density has reached a point where these tiny digital switches are generating more heat than can be removed through traditional means. That may sound manageable e... » read more

Brain-Inspired, Silicon Optimized
By Barry Pangrle - 29 Feb, 2024 - Comments: 0

The 2024 International Solid State Circuits Conference was held this week in San Francisco. Submissions were up 40% and contributed to the quality of the papers accepted and the presentations given at the conference. The mood about the future of semiconductor technology was decidedly upbeat with predictions of a $1 trillion industry by 2030 and many expecting that the soaring demand for AI e... » read more

Remote Droop Detection And Response Use Case
By Movellus - 28 Feb, 2024 - Comments: 0

While sea of processor architectures feature a stamp and repeat design, per-core workloads aren't always symmetrically balanced. For example, a cloud provider (AI or compute) will rent out individual core clusters to customers for specialized and varied workloads. However, this asymmetry, combined with rapid provisioning changes, can lead to global voltage droops on the SoC resulting in potenti... » read more

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