Can We Measure Next-Gen FinFETs?

By Mark LaPedus - 21 Nov, 2016 - Comments: 6

After ramping up their respective 16nm/14nm finFET processes, chipmakers are moving towards 10nm and/or 7nm, with 5nm in R&D. But as they move down the process roadmap, they will face a new set of fab challenges. In addition to lithography and interconnects, there is metrology. Metrology, the science of measurements, is used to characterize tiny films and structures. It helps to boost yi... » read more

Fab Tool Biz Looks Cloudy

By Mark LaPedus - 17 Dec, 2015 - Comments: 1

Amid a slowdown in the foundry and DRAM sectors, the outlook for the semiconductor equipment industry looks somewhat cloudy, if not challenging, in 2016. In fact, for equipment vendors, 2016 could resemble the lackluster year in 2015. In 2015, for example, capital spending in the foundry sector fell during the year, although NAND flash began to pick up steam. In 2015, though, the big stor... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 23 Oct, 2015 - Comments: 0

In a major and surprising move in the fab tool business, Lam Research has entered into a definitive agreement to acquire KLA-Tencor for about $10.6 billion in cash and stock. "Lam Research and KLA-Tencor have been working to tie together process and process control in an effort to expand process windows and better enable complex production steps, like multi-patterning. This acquisition form... » read more

Fab Tool M&A Slowdown?

By Mark LaPedus - 18 Jun, 2015 - Comments: 0

The semiconductor industry is in the midst of a dizzying array of mergers and acquisitions. At the current pace, some 32% of all U.S. publicly traded semiconductor companies are projected to get acquired in 2015, according to FBR. But in reality, the M&A activity will slow and edge towards a 15% consolidation rate for the year, according to the firm. Still, the IC industry is bracing for... » read more

Analysis: Applied-TEL Scrap Merger

By Mark LaPedus - 27 Apr, 2015 - Comments: 0

After several delays due to a myriad of complex regulatory issues, Applied Materials’ proposed deal to buy Tokyo Electron Ltd. (TEL) has been scrapped. It appears that the U.S. Department of Justice (DoJ) stepped in and blocked the deal. Now that the deal has been terminated, Applied Materials and TEL are separately re-grouping, and are back to where they originally started as fierce compe... » read more

Flash Dance For Inspection And Metrology

By Mark LaPedus - 16 Apr, 2015 - Comments: 0

Chipmakers are moving from planar technology to an assortment of 3D-like architectures, such as 3D NAND and finFETs For these devices, chipmakers face a multitude of challenges in the fab. But one surprising and oft-forgotten technology is emerging as perhaps the biggest challenge in both logic and memory—process control. Process control includes metrology and wafer inspection. Metrolo... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 27 Jun, 2014 - Comments: 0

As semiconductor technology becomes more challenging, expect more mergers and acquisitions in the fab tool sector. In a research report issued this week, Weston Twigg, an analyst with Pacific Crest Securities, sees several possible M&A scenarios in the future. There is no evidence that any deal is pending right now. But according to Twigg, here are some possible M&As that could happen i... » read more

The Bumpy Road To FinFETs

By Mark LaPedus - 15 May, 2014 - Comments: 2

The shift from planar transistors to finFETs is a major inflection point in the IC industry. FinFETs are expected to enable higher performance chips at lower voltages. And the next-generation transistor technology also could allow the industry to extend CMOS to the 10nm node and perhaps beyond. But as it turns out, finFET technology is also harder to master than previously thought. For exam... » read more

Gaps In Metrology Could Impact Yield

By Mark LaPedus - 17 Apr, 2014 - Comments: 0

For some time, chipmakers have been developing new and complex chip architectures, such as 3D NAND, finFETs and stacked die. But manufacturing these types of chips is no simple task. It requires a robust fab flow to enable new IC designs with good yields. In fact, yield is becoming a more critical part of the flow. Yield is a broad term that means different things to different parts of the ... » read more

Week In Review: Manufacturing, Design, Test

By Mark LaPedus - 07 Feb, 2014 - Comments: 0

This is no surprise, but it could be the end of an era. IBM is exploring a sale of its semiconductor business, according to FT.com. A survey, conducted by Harris Interactive on behalf of Crucial.com, revealed that when asked to choose between these two specific types of men, 84% of women who prefer to be involved with men prefer their male love interest to be "super handy" with computers an... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

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by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Nanometrics

Can We Measure Next-Gen FinFETs?

Fab Tool Biz Looks Cloudy

The Week In Review: Manufacturing

Fab Tool M&A Slowdown?

Analysis: Applied-TEL Scrap Merger

Flash Dance For Inspection And Metrology

The Week In Review: Manufacturing

The Bumpy Road To FinFETs

Gaps In Metrology Could Impact Yield

Week In Review: Manufacturing, Design, Test