Architect Specs Harder To Follow

By Ann Mutschler - 28 Dec, 2016 - Comments: 0

Interpreting and implementing architects' specifications is getting harder at each new process node, which is creating problems throughout the design flow, into manufacturing, and sometimes even post-production. Rising complexity and difficulties in scaling have pushed much more of the burden onto architects to deal with everything from complex power schemes, new packaging approaches, and to... » read more

CEO Outlook: Chip Design 2017

By Ed Sperling - 22 Dec, 2016 - Comments: 0

After two consecutive flat to slightly down years, the semiconductor industry is poised for growth in 2017. Cowan this month predicted 4.7% growth in semiconductor sales in 2017, while World Semiconductor Trade Statistics (WSTS) put that figure at 3.3%. And last month, International Business Strategies (IBS) pegged the number at 4.6%, according to statistics compiled by the Global Semiconduc... » read more

What’s Missing In Advanced Packaging

By Ann Mutschler - 22 Dec, 2016 - Comments: 0

Even though Moore's Law is running out of steam, there is still a need to increase functional density. Increasingly, this is being done with heterogeneous integration at the package or module level. This is proving harder than it looks. At this point there are no standardized methodologies, and tools often are retrofitted versions of existing tools that don't take into account the challenges... » read more

Overcoming The Limits Of Scaling

By Ed Sperling - 14 Dec, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss the increasing reliance on architectural choices for improvements in power, performance and area, with [getperson id="11425" comment=" Sundari Mitra"], CEO of [getentity id="22535" comment="NetSpeed Systems"]; Charlie Janac, chairman and CEO of [getentity id="22674" e_name="Arteris"]; [getperson id="11032" comment="Simon Davidmann"] CEO of [getentit... » read more

Tuning Heterogeneous SoCs

By Brian Bailey - 08 Dec, 2016 - Comments: 0

It's one thing to pack multiple processor cores into a design, but it is much more difficult to ensure the hardware matches the software's requirements, or that the software optimally uses the hardware. Both the hardware and software teams are now facing these issues, and there are few tools to help them fully understand the problems or to provide solutions. Design teams continue to add more... » read more

Timing Closure Issues Resurface

By Ed Sperling - 07 Dec, 2016 - Comments: 1

Timing closure has resurfaced as a major challenge at 10nm and 7nm due to more features and power modes, increased process variation and other manufacturing-related issues. While timing-related problems are roughly correlated to rising complexity in semiconductors, they tend to generate problems in waves—about once per decade. In SoCs, timing closure problems have spawned entire methodolog... » read more

Optimizing Multiple IoT Layers

By Ann Mutschler - 01 Dec, 2016 - Comments: 0

As the number of connected devices rises, so do questions about how to optimize them for target markets, how to ensure they play nicely together, and how to bring them to market quickly and inexpensively. [getkc id="76" kc_name="IoT"] is broad term that encompasses a lot of disparate pieces for devices, systems, and connected systems. At the highest levels are hardware and software, but with... » read more

Homogeneous And Heterogeneous Computing Collide

By Brian Bailey - 22 Nov, 2016 - Comments: 0

Eleven years ago processors stopped scaling due to diminishing returns and the breakdown of [getkc id="213" kc_name="Dennard's Law"]. That set in motion a chain of events from which the industry has still not fully recovered. The transition to homogeneous multi-core processing presented the software side with a problem that they did not know how to solve, namely how to optimize the usage of ... » read more

The Limits Of Parallelism

By Ann Mutschler - 22 Nov, 2016 - Comments: 0

Parallelism used to be the domain of supercomputers working on weather simulations or plutonium decay. It is now part of the architecture of most SoCs. But just how efficient, effective and widespread has parallelism really become? There is no simple answer to that question. Even for a dual-core implementation of a processor on a chip, results can vary greatly by software application, operat... » read more

The Week In Review: Design

By Jesse Allen - 28 Oct, 2016 - Comments: 0

IP ARM unveiled a suite of products focused on the IoT, with new processors, radio technology, subsystems, end-to-end security and a cloud-based services platform. Included are Cortex-M23 and Cortex-M33, the first embedded processors based on the ARMv8-M architecture. The Cortex-M33 features configuration options including a coprocessor interface, DSP and floating point computation, while th... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: NetSpeed Systems