HW Implementation Of An ONN Coupled By A ReRAM Crossbar Array (IBM, TU Eindhoven)


A new technical paper titled "Hardware Implementation of Ring Oscillator Networks Coupled by BEOL Integrated ReRAM for Associative Memory Tasks" was published by researchers at IBM Research Europe and Eindhoven University of Technology. Abstract "We demonstrate the first hardware implementation of an oscillatory neural network (ONN) utilizing resistive memory (ReRAM) for coupling elements. ... » read more

Research Bits: Mar. 25


2D materials in 3D transistors Researchers at the University of California Santa Barbara investigated 3D gate-all-around (GAA) transistors made using 2D semiconductors. They considered three different approaches to channel stacking: nano-sheet FETs, nano-fork FETs, and nano-plate FETs. The nano-plate FET architecture, which exploits lateral stacking of 2D layers, was found to maximize the g... » read more

Energy-Efficient Scalable Silicon Photonic Platform For AI Accelerator HW


A new technical paper titled "Large-Scale Integrated Photonic Device Platform for Energy-Efficient AI/ML Accelerators" was published by researchers at HP Labs, IIT Madras, Microsoft Research and University of Michigan. Abstract "The convergence of deep learning and Big Data has spurred significant interest in developing novel hardware that can run large artificial intelligence (AI) workload... » read more

Research Bits: Mar. 10


Incipient ferroelectricity Researchers from Penn State University and the University of Minnesota propose harnessing incipient ferroelectricity in multifunctional two-dimensional FETs to create neuromorphic computer memory. Materials with incipient ferroelectricity have no stable ferroelectric order at room temperature and need certain conditions to achieve an electrical charge. The FETs were ... » read more

Analog Accelerator For AI/ML Training Workloads Using Stochastic Gradient Descent (Imperial College London)


A new technical paper titled "Learning in Log-Domain: Subthreshold Analog AI Accelerator Based on Stochastic Gradient Descent" was published by researchers at Imperial College London. Abstract "The rapid proliferation of AI models, coupled with growing demand for edge deployment, necessitates the development of AI hardware that is both high-performance and energy-efficient. In this paper, w... » read more

Research Bits: Jan. 20


Self-correcting memristor array Researchers at Korea Advanced Institute of Science and Technology (KAIST), Seoul National University, Sungkyunkwan University, Electronics and Telecommunications Research Institute (ETRI), and Yonsei University developed a memristor-based neuromorphic chip that can learn and correct errors, enabling it to adapt to immediate environmental changes. The system c... » read more

Backpropagation Algorithm On Neuromorphic Spiking HW (U. Of Zurich, ETH Zurich, LANL)


A new technical paper titled "The backpropagation algorithm implemented on spiking neuromorphic hardware" was published by University of Zurich, ETH Zurich, Los Alamos National Laboratory, Royal Institution, London, et al. "This study presents a neuromorphic, spiking backpropagation algorithm based on synfire-gated dynamical information coordination and processing implemented on Intel’s Lo... » read more

Review of Advances in 3D integration of 2D Neuromorphic Electronics, Materials to Systems


A new technical paper titled "2D materials-based 3D integration for neuromorphic hardware" was published by researchers at  Seoul National University and University of Southern California. Find the technical paper here. November 2024. Kim, S.J., Lee, HJ., Lee, CH. et al. 2D materials-based 3D integration for neuromorphic hardware. npj 2D Mater Appl 8, 70 (2024). https://doi.org/10.10... » read more

Multi-Node, Virtualized Neuromorphic Architecture


A new technical paper titled "NeuroVM: Dynamic Neuromorphic Hardware Virtualization" was published by researchers at Stanford University, UT Austin and Temsa Research & Development Center. Abstract "This paper introduces a novel approach in neuromorphic computing, integrating heterogeneous hardware nodes into a unified, massively parallel architecture. Our system transcends traditional ... » read more

Memristors: Flexible Behavioral Model ( Israel Institute of Technology)


A new technical paper titled "VVTEAM: A Compact Behavioral Model for Volatile Memristors" was published by researchers at Technion – Israel Institute of Technology. Abstract "Volatile memristors have recently gained popularity as promising devices for neuromorphic circuits, capable of mimicking the leaky function of neurons and offering advantages over capacitor-based circuits in terms of... » read more

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