From Multicore To Many-Core

By Ed Sperling - 23 Sep, 2010 - Comments: 0

By Ed Sperling Future SoCs will move from multiple cores—typically two to four in a high-power processor—to dozens of cores. But answers are only beginning to emerge as to where and how those cores will be deployed and how they will be accessed. Just as Moore’s Law forced a move to multicore architectures inside a single processor because of leakage at higher frequencies, it will begi... » read more

Diverging Worlds

By Ed Sperling - 23 Sep, 2010 - Comments: 0

The big surprise at the GPU Technology Conference this year, spearheaded by Nvidia, isn’t that GPUs are getting faster or that they can do amazing things. It’s that so little attention has been paid to the volume platforms that people carry around in their pockets. What has always been interesting about GPUs is they are the one platform where software can be truly parallelized and accele... » read more

Storm Before The Calm

By Ed Sperling - 17 Sep, 2010 - Comments: 0

The announcements out of ARM and Intel over the past couple week—and presumably from rivals AMD, MIPS and even Nvidia in coming weeks—are more than just a struggle for one-upmanship. The goal is much more far-reaching and the stakes are significantly higher than who has the fastest processor or core or even the lowest-power version. In the past year there has been a massive push to expan... » read more

Power Or Performance?

By Ed Sperling - 10 Jun, 2010 - Comments: 0

By Pallab Chatterjee Most microprocessors have shifted to new small geometry processes in order to be the most efficient at power and high performance. However there is always a trade-off between power, performance and area (PPA) for semiconductors, and this is especially relevant for processors. In the current design space, processors are created as general-purpose products, but they are gene... » read more

Low-Power Architectures Go Mainstream

By Pallab Chatterjee - 14 Jan, 2010 - Comments: 0

By Pallab Chatterjee Until recently, low power engineering has been defined by the automated use of EDA tools in the design flow to help cut back on peak dynamic power. The new generation of mobile and video products has forced a change in that methodology. There are two other fast rising architectural approaches. The first is multicore, which is prevalent in new product introductions fr... » read more

Hot Chips 2009: It’s All About Multicore And Low-Power

By Pallab Chatterjee - 27 Aug, 2009 - Comments: 0

By Pallab Chatterjee The game has changed for processors. The goal now is data throughput, not higher gigahertz and more watts. That shift dominated the presentations at the Hot Chips conference this week. In previous years, the theme was higher single-core performance, more power and smaller geometries processes. This year it was all about multi-core and multi-power options as the realities ... » read more

First Down On The 40nm Line

By Ed Sperling - 30 Jun, 2009 - Comments: 0

The race to 40nm is over. Some chipmakers are already there, taping out designs and implementing IP that has already been qualified at the 40nm process. When exactly volume production begins and when yields improve is a matter of conjecture. TSMC so far is the only major foundry actively using the 40nm process, which is a half-node beyond 45nm. But the Common Platform already has briefed a... » read more

On, Off and Mostly Off

By Ed Sperling - 13 Mar, 2009 - Comments: 0

By Ed Sperling System-on-chip architecture has always been about getting the most performance out of a device, and the basic premise is that when you turn on a device it is always on. That approach has been challenged over the past few years with a fundamental shift toward more of the design being in the ‘off’ position. Aside from reversi... » read more

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Knowledge Centers
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eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

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