tag: Onto Innovation

Innovations Driving The Advanced Packaging Roadmap: Part Two
By Keith Best - 11 Feb, 2025 - Comments: 0

As the advanced packaging world enters the AI era, manufacturers are exploring ways to extend the life cycle of organic substrates and successfully introduce glass substrates to high volume manufacturing. In last month’s blog, “Innovations Driving The Advanced Packaging Roadmap: Part One,” we discussed the challenges of organic and glass substrates as the industry marches toward sub-2µm ... » read more

IC Equipment Communication Standards Struggle As Data Volumes Grow
By Anne Meixner - 11 Feb, 2025 - Comments: 0

The tsunami of data produced during wafer fabrication cannot be effectively leveraged without standards. They determine how data is accessed from equipment, which users need data access and when, and how fast it can be delivered. On top of that, best practices in data governance and data quality are needed to effectively interpret collected data and transfer results. When fab automation and ... » read more

Chip Industry Week In Review
By The SE Staff - 17 Jan, 2025 - Comments: 0

GlobalFoundries will create a new center for advanced packaging and testing of U.S.-made essential chips within its New York manufacturing facility. A flurry of announcements on advanced semiconductors and AI rolled out this week as U.S. President Biden wrapped up his term: The Biden-Harris Administration released an Interim Final Rule on Artificial Intelligence Diffusion to strengthen ... » read more

Innovations Driving The Advanced Packaging Roadmap: Part One
By Keith Best - 14 Jan, 2025 - Comments: 1

Advanced IC substrates (AICS) have been marching toward the 2µm line/space (L/S) redistribution layer (RDL) technology node for some time (figure 1). However, many questions remain about the ability of organic substrates to meet the line/space requirements of the next generation of advanced packages (AP), those below 2µm L/S and perhaps to 1.5µm L/S. Simply put: are organic substrates up to ... » read more

Using Test And Metrology Data For Dynamic Process Control
By Gregory Haley - 14 Jan, 2025 - Comments: 0

Advanced packaging is transforming semiconductor manufacturing into a multi-dimensional challenge, blending 2D front-end wafer fabrication with 2.5D/3D assemblies, high-frequency device characterization, and complex yield optimization strategies. These combinations are essential to improving performance and functionality, but they create some thorny issues for which there are no easy fixes. ... » read more

Screening For Known Good Interposers
By Anne Meixner - 14 Jan, 2025 - Comments: 0

Ensuring the quality of silicon and organic interposers is becoming harder as the number of signals passing through them continues to grow, fueled by more chiplets, higher processing demands, and more layers of devices assembled in a package. Interposers initially were viewed as relatively simple conduits. That perception has changed rather dramatically in recent years with the growing focus... » read more

Aftermarket Sensors Boost Yield In Wafer Fabs
By Anne Meixner - 10 Dec, 2024 - Comments: 0

Third-party sensors are being added into fab equipment to help boost yield and to extend the life of expensive tools, supplementing the sensors that come with equipment used in fabs. The data gleaned from those sensors has broad uses within the fab. It can measure process module performance, identify defect sources, and alert fabs of impending equipment failure. And when coupled with machine... » read more

Silicon Lifecycle Management Gains Steam
By Laura Peters - 10 Dec, 2024 - Comments: 0

Silicon lifecycle management (SLM) is gaining significant traction, driven increasingly by stringent reliability requirements for safety-critical devices in aerospace, medical, and automotive. Improving reliability has been a discussion point for years, but it has become especially important with the use of chips designed at leading-edge nodes in both mission- and safety-critical application... » read more

FOPLP Gains Traction in Advanced Semiconductor Packaging
By Gregory Haley - 21 Nov, 2024 - Comments: 1

Fan-Out Panel-Level Packaging (FOPLP) for advanced nodes, once hindered by manufacturability and yield challenges, is emerging as a promising solution to meet the industry’s demands for higher integration densities and cost efficiency. Traditionally, FOPLP has been a go-to solution for cost-sensitive applications in consumer electronics, IoT devices, and mid-tier automotive systems. Its ab... » read more

Getting The Biggest ROI On Your Digital Twin
By Sean King - 12 Nov, 2024 - Comments: 0

In the semiconductor industry, digital twins are the focus of a lot of attention, with substantial investments from industry players and governments alike. This year the European Union and the United States have pledged hundreds of millions of dollars in grants and funding opportunities, including the new CHIPS Digital Twin Manufacturing USA Institute. Ultimately, many people see great value in... » read more

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