Why Thin Film Measurements Matter


Semiconductor devices are becoming thinner and more complex, making thin deposited films even harder to measure and control. With 3nm node devices in production and 2nm nodes ramping toward first-silicon, the importance of precise film measurement is only growing in significance as fabs seek to maintain the performance and reliability of leading-edge devices. Whether it’s the read and writ... » read more

Hunting For Macro Defects


Detecting macro-defects early in the wafer processing flow is vital for yield and process improvement, and it is driving innovations in both inspection techniques and wafer test map analysis. At the wafer level, a macro-defect can affect more than one die, and in some cases large regions of a wafer. Finding macro defects can indicate a significant issue with a process module, a particular fi... » read more

Need For KGD Drives Singulated Die Screening


The move to multi-die packaging is driving chipmakers to develop more cost-effective ways to ensure only known-good die are integrated into packages, because the price of failure is significantly higher than with a single die. Better methods for inspecting and testing these devices are already starting to roll out. High-throughput infrared inspection is capable of catching more sub-surface d... » read more

Measuring Multi-Layer Ultra-Thin Critical Films


Artificial intelligence is one of the driving forces in today’s semiconductor industry, with more traditional market drivers like high performance compute and smart phones continuing to play important roles. This situation is unlikely change in the years ahead as chip makers continue their quest to create the most advanced nodes. With 3nm nodes in production and 2nm nodes on the horizon, the ... » read more

Automation And AI Improve Failure Analysis


When a chip malfunctions it’s the job of the failure analysis engineer to determine how it failed or significantly deviated from its key performance metrics. The cost of failure in the field can be huge in terms of downtime, recalls, damage to a company’s reputation, and more. For these reasons, chipmakers take customer returns very seriously, focusing resources to quickly get to the bot... » read more

Innovations Driving The Advanced Packaging Roadmap: Part Two


As the advanced packaging world enters the AI era, manufacturers are exploring ways to extend the life cycle of organic substrates and successfully introduce glass substrates to high volume manufacturing. In last month’s blog, “Innovations Driving The Advanced Packaging Roadmap: Part One,” we discussed the challenges of organic and glass substrates as the industry marches toward sub-2µm ... » read more

IC Equipment Communication Standards Struggle As Data Volumes Grow


The tsunami of data produced during wafer fabrication cannot be effectively leveraged without standards. They determine how data is accessed from equipment, which users need data access and when, and how fast it can be delivered. On top of that, best practices in data governance and data quality are needed to effectively interpret collected data and transfer results. When fab automation and ... » read more

Chip Industry Week In Review


GlobalFoundries will create a new center for advanced packaging and testing of U.S.-made essential chips within its New York manufacturing facility. A flurry of announcements on advanced semiconductors and AI rolled out this week as U.S. President Biden wrapped up his term: The Biden-Harris Administration released an Interim Final Rule on Artificial Intelligence Diffusion to strengthen ... » read more

Innovations Driving The Advanced Packaging Roadmap: Part One


Advanced IC substrates (AICS) have been marching toward the 2µm line/space (L/S) redistribution layer (RDL) technology node for some time (figure 1). However, many questions remain about the ability of organic substrates to meet the line/space requirements of the next generation of advanced packages (AP), those below 2µm L/S and perhaps to 1.5µm L/S. Simply put: are organic substrates up to ... » read more

Using Test And Metrology Data For Dynamic Process Control


Advanced packaging is transforming semiconductor manufacturing into a multi-dimensional challenge, blending 2D front-end wafer fabrication with 2.5D/3D assemblies, high-frequency device characterization, and complex yield optimization strategies. These combinations are essential to improving performance and functionality, but they create some thorny issues for which there are no easy fixes. ... » read more

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