tag: Pacific Crest Securities

The Week In Review: Manufacturing
By Mark LaPedus - 26 Feb, 2016 - Comments: 0

What was the mood at this week’s SPIE Litho? “EUV sentiment is improving among chipmakers as ASML makes progress toward HVM metrics; however, there is still much hedging around timing and readiness. We view EUV adoption as likely to be slow and gradual through 2020,” said Weston Twigg, an analyst with Pacific Crest Securities, in a report. “In order for ASML to hit the higher levels of ... » read more

1xnm DRAM Challenges
By Mark LaPedus - 18 Feb, 2016 - Comments: 3

At a recent event, Samsung presented a paper that described how the company plans to extend today’s planar DRAMs down to 20nm and beyond. This is an amazing feat. Until very recently, most engineers believed DRAMs would stop scaling at 20nm or so. Instead, Samsung is ramping up the world’s most advanced DRAMs—a line of 20nm parts—with plans to go even further. Micron and SK Hynix soo... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 29 Jan, 2016 - Comments: 0

Qualcomm recently announced the new Snapdragon 820. The cell-phone chipset is based on Samsung Electronics’ new 14nm LPP (Low-Power Plus) process, the second-generation of the company’s 14nm finFET process technology. What’s next? Qualcomm is developing the Snapdragon 830. “Snapdragon 830 leaks indicate that the chip will sport 8GB of RAM, an enhanced Kryo custom architecture, and fabbe... » read more

Inside Samsung’s Foundry Biz
By Mark LaPedus - 23 Jul, 2015 - Comments: 0

Semiconductor Engineering sat down to talk about the foundry business, process technology, design and other topics with Hong Hao, senior vice president of the foundry business at [getentity id="22865" e_name="Samsung Semiconductor"]; and Kelvin Low, senior director of foundry marketing at Samsung Semiconductor. What follows are excerpts of that discussion. SE: The foundry business has alway... » read more

Foundries Expand Planar Efforts
By Mark LaPedus - 18 Jun, 2015 - Comments: 0

Competition is heating up in the leading-edge foundry business, as vendors begin to ramp up their new 16nm/14nm finFET processes. But that’s not the only action in the foundry arena. They are also expanding their efforts in the leading-edge planar market by rolling out new 28nm and 22nm processes. On one front, TSMC is offering new 28nm variants, based on bulk CMOS technology. And on an... » read more

FinFET Rollout Slower Than Expected
By Mark LaPedus - 16 Apr, 2015 - Comments: 1

The foundry business is heating up as some new and large players are entering the 16nm/14nm [getkc id="185" kc_name="finFET"] market. But foundry customers are taking longer than expected to migrate to finFETs amid some technical and cost issues. On the foundry front, [getentity id="22846" comment="Intel"] has been the sole player in finFETs for some time. But now, [getentity id="22865" ... » read more

3D NAND Market Heats Up
By Mark LaPedus - 19 Feb, 2015 - Comments: 4

After some delays and uncertainty in past years, the 3D NAND market is finally heating up. In 2013 and 2014, Samsung was the only vendor participating in the 3D NAND market. Most other suppliers were supposed to ship 3D NAND devices in volumes last year, but vendors pushed out their production dates for various business and technical reasons. Going into 2015, [getentity id="22865" e_nam... » read more

Who’s Winning The FinFET Foundry Race?
By Mark LaPedus - 14 Aug, 2014 - Comments: 5

The leading-edge foundry business is challenging. For starters, foundry vendors require vast resources, gigantic fabs and lots of know-how. And yet, it’s still difficult to make money in this business. That has certainly proven to be the case in the planar transistor era, but the challenges and costs are escalating as foundry vendors begin to ramp up finFET technologies at the 16nm/14nm no... » read more

Atomic Layer Etch Finally Emerges
By Mark LaPedus - 15 May, 2014 - Comments: 1

The migration towards finFETs and other devices at the 20nm node and beyond will require a new array of chip-manufacturing technologies. Multiple patterning, hybrid metrology and newfangled interconnect schemes are just a few of the technologies required for future scaling. In addition, the industry also will require new techniques that can process structures at the atomic level. For example... » read more

Gaps In Metrology Could Impact Yield
By Mark LaPedus - 17 Apr, 2014 - Comments: 0

For some time, chipmakers have been developing new and complex chip architectures, such as 3D NAND, finFETs and stacked die. But manufacturing these types of chips is no simple task. It requires a robust fab flow to enable new IC designs with good yields. In fact, yield is becoming a more critical part of the flow. Yield is a broad term that means different things to different parts of the ... » read more

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