tag: PAM-8

Research Bits: Nov. 26
By Jesse Allen - 26 Nov, 2025 - Comments: 0

Hydrogel NAND gate Researchers from McMaster University and the University of Pittsburgh created a functionally complete NAND gate in a soft material using only beams of visible light. The NAND logic operation was completed by shining three self-trapped light beams into a photoresponsive merocyanine-functionalized hydrogel that is capable of performing compute tasks in the material itself w... » read more

Race to 448 Gbps
By Keysight - 06 Nov, 2025 - Comments: 0

The relentless growth in data center and AI workloads is accelerating the need for faster, more efficient interconnect technologies. As applications like large language models and distributed training infrastructures push the limits of bandwidth, 400/800G Ethernet is quickly becoming a bottleneck. To support next-generation performance at 1.6T and 3.2T system levels, engineers must enable relia... » read more

Retimers Replacing Redrivers As Signal Speeds Increase
By Bryon Moyer - 08 Jul, 2021 - Comments: 1

Retimers are undergoing a renaissance as new PHY protocols prove too demanding for redrivers. Redrivers and retimers both have been used to extend wired signal reach over the years. But redrivers have dominated this space due to their relative simplicity and lower cost. That balance is beginning to change. “A retimer represents three things no one wants in their system — area, cost, a... » read more

What’s After PAM-4?
By Bryon Moyer - 23 Jun, 2020 - Comments: 1

[This is part 2 of a 2-part series. Part 1 can be found here.] The future of high-speed physical signaling is uncertain. While PAM-4 remains one of the key standards today, there is widespread debate about whether PAM-8 will succeed it. This has an impact on everything from where the next bottlenecks are likely to emerge and the best approaches to solving them, to how chips, systems and p... » read more

High-Speed Signaling Drill-Down
By Bryon Moyer - 17 Jun, 2020 - Comments: 0

Chip interconnect standards have received a lot of attention lately, with parallel versions proliferating for chiplets and serial versions moving to higher speeds. The lowliest characteristic of these interconnect schemes is the physical signaling format. Having been static at NRZ (non-return-to-zero) for decades, change is underway. “Multiple approaches are likely to emerge,” said Brig ... » read more

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