A Hierarchical Instruction Cache Tailored To Ultra-Low-Power Tightly-Coupled Processor Clusters

A technical paper titled “Scalable Hierarchical Instruction Cache for Ultra-Low-Power Processors Clusters” was published by researchers at University of Bologna, ETH Zurich, and GreenWaves Technologies. Abstract: "High Performance and Energy Efficiency are critical requirements for Internet of Things (IoT) end-nodes. Exploiting tightly-coupled clusters of programmable processors (CMPs) ha... » read more

Optimizing Hardware Capacity, Utilizing Automatic Differentiation to Efficiently Compute Derivatives in Parallel Programming Models

A technical paper titled "Scalable Automatic Differentiation of Multiple Parallel Paradigms through Compiler Augmentation" was published by researchers at MIT (CSAIL), Argonne National Lab, and TU Munich. The paper was a Best Paper Finalist and a Best Student Paper winner at SuperComputing 2022. Find the technical paper here. Published November 2022. The work "demonstrates how Enzyme opti... » read more