Optimizing Vmin With Path Margin Monitors

By Firooz Massoudi and Ash Patel Choosing the right operating voltage for various digital blocks within a semiconductor device is one of the most important tasks faced by chip designers. Operating voltage has major effects on performance, power consumption, and reliability. Increasing the voltage generally increases performance, but at the cost of more power and higher lifetime operating cos... » read more

Closing The Post-Silicon Timing Analysis Gap

Accurate static timing analysis is one of the most important steps in the development of advanced node semiconductor devices. Performance numbers are included in chip and system specifications from the earliest marketing requirements. The architects and designers carefully determine clock cycle times that can achieve the required performance using the chosen high-level architecture, micro-archi... » read more

If These Chips Could Talk: Actionable Insights From Path Margin Monitors

One of the most important current trends in electronics is the gathering and analysis of big data to reap benefits in cost, power, performance, and reliability. This is becoming common in the chip development flow. For example, data harvested from simulation regressions can aid in debug and reaching coverage goals. Machine learning (ML) uses the results of many passes through implementation (lo... » read more