Designing For In-Circuit Monitors

By Ann Mutschler - 27 Apr, 2023 - Comments: 0

In every application space the semiconductor ecosystem touches, in-circuit monitors and sensors are playing an increasing role in silicon lifecycle management and concepts around reliability and resiliency — both during design as well as in the field. The combination of true system-level design, in/on-chip monitors, and improved data analysis are expected to drastically improve reliability... » read more

Bug-Free Designs

By Brian Bailey - 27 Oct, 2022 - Comments: 0

It is possible in theory to create a design with no bugs, but it's impractical, unnecessary, and extremely difficult to prove for bugs you care about. The problem is intractable because the potential state space is enormous for any practical design. The industry has devised ways to handle this complexity, but each has limitations, makes assumptions, and employs techniques that abstract the p... » read more

Customization, Heterogenous Integration, And Brute Force Verification

By Ed Sperling - 14 Jul, 2022 - Comments: 0

Semiconductor Engineering sat down to discuss why new approaches are required for heterogeneous designs, with Bari Biswas, senior vice president for the Silicon Realization Group at Synopsys; John Lee, general manager and vice president of the Ansys Semiconductor business unit; Michael Jackson, corporate vice president for R&D at Cadence; Prashant Varshney, head of product for Microsoft Azu... » read more

Creating IoT Devices That Will Remain Secure

By Ed Sperling - 30 Nov, 2021 - Comments: 0

What’s secure today may not be secure in the future, and even if you include an IoT device with state-of-the-art security, it may be surrounded by less secure devices. Steve Hanna, distinguished engineer at Infineon, examines the impact of security on IoT adoption, why resilience across a system is the new target for secure designs, and how to minimize the impact of less secure devices. » read more

Fundamental Changes In Economics Of Chip Security

By Ed Sperling - 10 Jun, 2020 - Comments: 0

Protecting chips from cyberattacks is becoming more difficult, more expensive and much more resource-intensive, but it also is becoming increasingly necessary as some of those chips end up in mission-critical servers and in safety-critical applications such as automotive. Security has been on the semiconductor industry's radar for at least the past several years, despite spotty progress and ... » read more

Reliability, Machine Learning And Advanced Packaging

By Ed Sperling - 11 Oct, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss reliability, resilience, machine learning and advanced packaging with Rahul Goyal, vice president in the technology and manufacturing group at Intel; Rob Aitken, R&D fellow at Arm; John Lee, vice president and general manager of the semiconductor business unit at ANSYS; and Lluis Paris, director of IP portfolio marketing at TSMC. What follows ar... » read more

Connecting The Car

By Ed Sperling - 22 Jun, 2017 - Comments: 0

K. Charles Janac, chairman and CEO of ArterisIP, sat down with Semiconductor Engineering to discuss changes in automotive and how the connected car will affect chip design and a multitude of other markets. What follows are excerpts of that conversation. SE: What is the biggest change you're seeing in semiconductors? Janac: The really big change is that mobility is flattening out. The mark... » read more

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Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: resilience

Designing For In-Circuit Monitors

Bug-Free Designs

Customization, Heterogenous Integration, And Brute Force Verification

Creating IoT Devices That Will Remain Secure

Fundamental Changes In Economics Of Chip Security

Reliability, Machine Learning And Advanced Packaging

Connecting The Car

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Knowledge Centers
Entities, people and technologies explored