Experimental Characterization Results and State-of-the-Art Device-Level Studies of DRAM Read Disturbance


A new technical paper titled "Revisiting DRAM Read Disturbance: Identifying Inconsistencies Between Experimental Characterization and Device-Level Studies" was published by researchers at ETH Zurich. Abstract "Modern DRAM is vulnerable to read disturbance (e.g., RowHammer and RowPress) that significantly undermines the robust operation of the system. Repeatedly opening and closing a DRAM ro... » read more

Solution To Read Disturbance For Current And Future DRAM Chips at Low Area, Performance And Energy Costs (ETH Zurich et al.)


A new technical paper titled "Chronus: Understanding and Securing the Cutting-Edge Industry Solutions to DRAM Read Disturbance" was published by researchers at ETH Zurich, TOBB, and University of Sharjah. Abstract "We 1) present the first rigorous security, performance, energy, and cost analyses of the state-of-the-art on-DRAM-die read disturbance mitigation method, Per Row Activation Count... » read more

Effects Of Reduced Refresh Latency On RowHammer Vulnerability Of DDR4 DRAM Chips


A new technical paper titled "Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions" was published by researchers at ETH Zurich, TOBB University of Economics and Technology, and University of Sharjah. Abstract "RowHammer is a major read disturbance mechanism in DRAM where repeatedly accessing (hammering) a row of... » read more

Temporal Variation in DRAM Read Disturbance in DDR4 and HBM2 (ETH Zurich, Rutgers)


A new technical paper titled "Variable Read Disturbance: An Experimental Analysis of Temporal Variation in DRAM Read Disturbance" was published by researchers at ETH Zurich and Rutgers University. Abstract "Modern DRAM chips are subject to read disturbance errors. State-of-the-art read disturbance mitigations rely on accurate and exhaustive characterization of the read disturbance threshold... » read more

Rowhammer Mitigation With Adaptive Refresh Management Optimization (KAIST, Sk hynix)


A new technical paper titled "Securing DRAM at Scale: ARFM-Driven Row Hammer Defense with Unveiling the Threat of Short tRC Patterns" was published by researchers at KAIST and Sk hynix. Abstract (partial) "To address the issue of powerful row hammer (RH) attacks, our study involved an extensive analysis of the prevalent attack patterns in the field. We discovered a strong correlation betwee... » read more

Rowhammer Protection By Addressing Root Cause (Georgia Tech)


A new technical paper titled "Preventing Rowhammer Exploits via Low-Cost Domain-Aware Memory Allocation" was published by researchers at Georgia Tech. Abstract "Rowhammer is a hardware security vulnerability at the heart of every system with modern DRAM-based memory. Despite its discovery a decade ago, comprehensive defenses remain elusive, while the probability of successful attacks grows ... » read more

Memory Fundamentals For Engineers


Memory is one of a very few elite electronic components essential to any electronic system. Modern electronics perform extraordinarily complex duties that would be impossible without memory. Your computer obviously contains memory, but so does your car, your smartphone, your doorbell camera, your entertainment system, and any other gadget benefiting from digital electronics. This eBook prov... » read more

A New Low-Cost HW-Counterbased RowHammer Mitigation Technique


A technical paper titled “ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation” was presented at the August 2024 USENIX Security Symposium by researchers at ETH Zurich. Abstract: "We introduce ABACuS, a new low-cost hardware-counterbased RowHammer mitigation technique that performance-, energy-, and area-efficiently scales with worsening Ro... » read more

Secure Low-Cost In-DRAM Trackers For Mitigating Rowhammer (Georgia Tech, Google, Nvidia)


A new technical paper titled "MINT: Securely Mitigating Rowhammer with a Minimalist In-DRAM Tracker" was published by researchers at Georgia Tech, Google, and Nvidia. Abstract "This paper investigates secure low-cost in-DRAM trackers for mitigating Rowhammer (RH). In-DRAM solutions have the advantage that they can solve the RH problem within the DRAM chip, without relying on other parts of ... » read more

Analysis Of The On-DRAM-Die Read Disturbance Mitigation Method: Per Row Activation Counting


A technical paper titled “Understanding the Security Benefits and Overheads of Emerging Industry Solutions to DRAM Read Disturbance” was published by researchers at ETH Zürich and TOBB University of Economics and Technology. Abstract: "We present the first rigorous security, performance, energy, and cost analyses of the state-of-the-art on-DRAM-die read disturbance mitigation method, Per... » read more

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