Chip Industry Week In Review


CSIS issued a new report that says Intel is "not too big to fail, but too good to lose." The report noted that Intel is needed for national security, and that it must be viewed in a geopolitical context rather than from a purely business standpoint when it comes to funding the company. Japan's government is creating a 10 trillion yen (~$65 billion) fund for next-gen technologies, including A... » read more

Chip Industry Week In Review


Siemens announced plans to acquire Altair Engineering, a provider of industrial simulation and analysis, data science, and high-performance computing (HPC) software, for about $10 billion. Altair's software will become part of Siemens' Xcelerator portfolio and provide a boost to physics-based digital twins. Onto Innovation bought Lumina Instruments, a San Jose, California-based maker of lase... » read more

Chip Industry Technical Paper Roundup: Oct. 14


New technical papers recently added to Semiconductor Engineering’s library: [table id=367 /] More Reading Chip Industry Week In Review AI CPU chiplet platform; Intel-AMD pact; GDDR7 DRAM; AI-RFIC funding; CHIPS Act awards; NoC tiling; thermal modeling on chiplets; $900M nuclear tech and more. Technical Paper Library home » read more

Improving The Gate Oxide Reliability in Gate First HKMG DRAM Structures (Sungkyunkwan Univ., Samsung)


A new technical paper titled "Novel STI Technology for Enhancing Reliability of High-k/Metal Gate DRAM" was published by researchers at Sungkyunkwan University and Samsung Electronics. Abstract: "The challenges associated with semiconductor are increasing because of the rapid changes in the semiconductor market and the extreme scaling of semiconductors, with some processes reaching their te... » read more

Chip Industry Technical Paper Roundup: August 20


New technical papers recently added to Semiconductor Engineering’s library: [table id=252 /] More ReadingTechnical Paper Library home » read more

5 Novel Layout Design Methodologies For The 3nm Nanosheet FET Library (Samsung, KNU)


A new technical paper titled "Design Technology Co-Optimization and Time-Efficient Verification for Enhanced Pin Accessibility in the Post-3-nm Node" was published by researchers at Samsung Electronics and Kyungpook National University (KNU). Abstract: "As the technology nodes approach 3 nm and beyond, nanosheet FETs (NSFETs) are replacing FinFETs. However, despite the migration of devices ... » read more

Chip Industry Week In Review


Early version due to U.S. holiday. The U.S. government announced a new $504 million funding round for 12 Regional Technology and Innovation Hubs (Tech Hubs) for semiconductors, clean energy, biotechnology, AI, quantum computing, and more. Among the recipients: NY SMART I-Corridor Tech Hub (New York): $40 million for semiconductor manufacturing; Headwaters Hub (Montana): $41 million f... » read more

Chip Industry Week In Review


Absolics, an affiliate of Korea materials company SKC, will receive up to $75 million in direct funding under the U.S. CHIPS Act for the construction of a 120,000 square-foot facility in Covington, Georgia, for glass substrates in advanced packaging. imec will host a €2.5 billion (~$2.72B) pilot line for researching chips beyond 2nm, partially funded through the EU Chips Act. imec CEO Luc ... » read more

Chip Industry Week In Review


Samsung and Synopsys collaborated on the first production tapeout of a high-performance mobile SoC design, including CPUs and GPUs, using the Synopsys.ai EDA suite on Samsung Foundry's gate-all-around (GAA) process. Samsung plans to begin mass production of 2nm process GAA chips in 2025, reports BusinessKorea. UMC developed the first radio frequency silicon on insulator (RF-SOI)-based 3D IC ... » read more

Chip Industry Technical Paper Roundup: March 26


New technical papers recently added to Semiconductor Engineering’s library. [table id=209 /] Find last week's technical paper additions here. » read more

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