Reworking Established Nodes


New technology markets and a flattening in smartphone growth has sparked a resurgence in older technology processes. For many of these up-and-coming applications, there is no compelling reason to migrate to the latest process node, and equipment companies and fabs are rushing to fill the void. As with all electronic devices, the focus is on cost-cutting. But because these markets are likely ... » read more

The Week In Review: Design


Tools Mentor Graphics uncorked the latest version of its Catapult high-level synthesis platform, adding a formal-based C Property Checker tool to automatically identify and formally prove hard-to-find issues like uninitialized memory, divide by 0, and array bounds errors in the users' HLS C++/SystemC model. IP ARM unveiled the Cortex-A73 and Mali-G71 processors. According to ARM, the g... » read more

The Week In Review: Design/IoT


Mergers & Acquisitions Cadence acquired [getentity id="22444" comment="Rocketick"], an Israel-based company focused on multicore parallel simulation. Founded in 2008, their original rise and claim to fame was acceleration on GPUs, having received significant funding from Nvidia. The deal is expected to close in the second quarter of fiscal 2016, and terms were not disclosed. Tools &am... » read more

The Week In Review: Design/IoT


Tools Synopsys unveiled a new custom design solution targeting FinFET layout, introducing visually-assisted routing automation, a built-in design rule checking engine, templates to apply previous layout decisions to new designs, and IC Compiler integration. TSMC certified the new tool for 10nm and 7nm FinFET process technologies. It has also been adopted by STMicroelectronics, GSI Technology... » read more

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