What Comes After HBM For Chiplets


Experts At The Table: Semiconductor Engineering sat down to discuss what will trigger the creation of a commercial chiplet marketplace, and what those chiplet-based designs will look like, with Elad Alon, CEO of Blue Cheetah; Mark Kuemerle, vice president of technology at Marvell; Kevin Yee, senior director of IP and ecosystem marketing at Samsung; Sailesh Kumar, CEO of Baya Systems; and Tanuja... » read more

Chip Industry Week In Review


Infineon rolled out the world's first 300mm gallium nitride (GaN) wafer, opening the door for high-volume manufacturing of GaN-based power semiconductors. A 300mm wafer contains 2.3 times as many chips per wafer as a 200mm wafer. Fig.1: Infineon's 300mm GaN wafer. Source: Infineon The Semiconductor Industry Association released its 2024 State of the U.S. Semiconductor Industry report th... » read more

The Challenges Of Upgrading Lithium Batteries


The ongoing electrification of everyday items has resulted in the proliferation of batteries, and spurred continued development for automotive and grid use. Lithium-ion batteries still dominate the rechargeable-battery landscape, with solid-state versions prolonging that position, but other lithium variants aim for greater safety while raising energy capacity. Battery researchers must balanc... » read more

Chip Industry Week in Review


The Biden-Harris Administration announced preliminary terms with HP for $50 million in direct funding under the CHIPs and Science Act to support the expansion and modernization of HP’s existing microfluidics and microelectromechanical systems (“MEMS”) facility in Corvallis, Oregon. CHIPS for America launched the CHIPS Metrology Community, a collaborative initiative designed to advance ... » read more

Defining The Chiplet Socket


Experts At The Table: The semiconductor industry has been buzzing with the possibilities surrounding chiplets, but so far this packaging technology has been confined to large semiconductor companies that are vertically integrated. The industry has been attempting to open this up to a broader group of people. To work out what this means for chiplets, and what standardization will be required, Se... » read more

Chip Industry Week In Review


The U.S. Department of Commerce and Texas Instruments (TI) signed a non-binding preliminary memorandum of terms to provide up to $1.6 billion in CHIPS Act funding towards TI’s investment of over $18 billion for three 300mm semiconductor wafer fabs under construction in Texas and Utah. TI also expects to get about $6 billion to $8 billion from the U.S. Department of Treasury’s Investmen... » read more

Building Smarter, Better Fabs


Battling labor shortages, faster ramp rates, and data overload, the process of designing and building greenfield fabs requires a combination of tech tools, failing earlier approaches and superior planning from day one. The complexity and scale of semiconductor fabs is skyrocketing as is the capital cost. Chipmakers are looking to ramp multibillion dollar fabs faster despite the hurdles of la... » read more

Reasons To Know IGZO


Interest in monolithic 3D integration is driven by both compute-in-memory applications and a more general need for increased circuit density. Compute-in-memory architectures seek to reduce the power requirements of machine learning workloads, which are dominated by the movement of data between memory and logic components. Even in conventional architectures, though, placing high-density, high-ba... » read more

Chip Industry Week In Review


Three Fraunhofer Institutes (IIS/EAS, IZM, and ENAS) launched the Chiplet Center of Excellence, a research initiative to support the commercial introduction of chiplet technology. The center initially will focus on automotive electronics, developing workflows and methods for electronics design, demonstrator construction, and the evaluation of reliability. The UCIe Consortium published the Un... » read more

Legacy Process Nodes Going Strong


While all eyes tend to focus on the leading-edge silicon nodes, many mature nodes continue to enjoy robust manufacturing demand. Successive nodes stopped reducing die cost at around the 20nm node. “In the finFET era of processes, esoteric process requirements necessary to move technology forward with each generation have added significant cost and complexity,” explained Andrew Appleby, p... » read more

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