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Using SLX FPGA For Performance Optimization Of SHA-3 For HLS


Author: Zubair Wadood SLX FPGA facilitates converting your C/C++ project into an FPGA bitstream easier and with higher performance. Leveraging standard HLS (High Level Synthesis) tools from FPGA vendors, SLX FPGA tackles the challenges associated with the HLS design flow. In this paper, the results of an SLX FPGA-optimized implementation of a Secure Hash Algorithm (SHA-3; also known as Kecca... » read more

Emerging Security Protocols


As the proliferation of mobile devices ramps up at escalating rates, securing these devices and the infrastructure they run on is becoming a top priority for both the hardware and the data that swirls within it. Traditional security platforms such as firewalls and antivirus programs are still a viable part of the security envelope, but the rapid emergence of zero-day/hour threats is somethin... » read more