Jamie Shaeffer, senior director of product line management at GlobalFoundries, talks about how FD-SOI compares with bulk technologies, where it will be used and why, and future stacking options.
https://youtu.be/2i7GJRxcNRs » read more
California SiC factory funding; IEDM announcements, including 2nm and 2D materials advances from Intel and TSMC, CFETs, and subtractive ruthenium metallization; Rapidus' new partnerships; Synopsys' 1.6 Tbps Ethernet IP; Micron's $6.1B DRAM fab grant; global IC sales set record; Lam's maintenance cobot; China ramps U.S. imports ahead of tariffs.
Next-gen EUV laser R&D; $285M CHIPS Act award; U.S. microelectronics research centers; Synaptics-Google deal; maskless microLED DUV; Micron's $2B fab expansion; Tesla sales slump; USB-C mandate in Europe.
Heterogenous integration is pushing chip and package designers to consider multi-physics effects as early as the initial architectural planning stage; new tools may be needed.
Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.
The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?
eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.
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