Chip Industry Week In Review

By The SE Staff - 26 Apr, 2024 - Comments: 0

President Biden announced four new Workforce Hubs to support the CHIPS Act and other initiatives, in Upstate New York, Michigan, Milwaukee, and Philadelphia. The White House also provided economic context and progress updates for the President’s workforce strategy. Samsung began mass production of its ninth-gen industry-first V-NAND chip. Along with one-terabit triple-level cell design, th... » read more

Strategies For Detecting Sources Of Silent Data Corruption

By Anne Meixner - 12 Mar, 2024 - Comments: 0

Engineering teams are wrestling with how to identify the root causes of silent data corruption (SDC) in a timely and cost-effective way, but the solutions are turning out to be broader and more complex than simply fixing a single defect. This is particularly vexing for data center reliability, accessibility and serviceability (RAS) engineering teams, because even the best tools and methodolo... » read more

2.5D Integration: Big Chip Or Small PCB?

By Brian Bailey - 29 Feb, 2024 - Comments: 1

Defining whether a 2.5D device is a printed circuit board shrunk down to fit into a package, or is a chip that extends beyond the limits of a single die, may seem like hair-splitting semantics, but it can have significant consequences for the overall success of a design. Planar chips always have been limited by size of the reticle, which is about 858mm2. Beyond that, yield issues make the si... » read more

Chip Industry Week In Review

By The SE Staff - 26 Jan, 2024 - Comments: 0

By Jesse Allen, Karen Heyman, and Susan Rambo UMC and Intel will collaborate on the development of a 12nm semiconductor process platform to address high-growth markets, such as mobile, communications infrastructure, and networking. Apple reportedly pushed back the launch date of its long-awaited electric vehicle and scaled back the self-driving features to L2 driver assistance, according ... » read more

Chip Industry Week In Review

By The SE Staff - 01 Dec, 2023 - Comments: 0

By Susan Rambo, Gregory Haley, and Liz Allan Amkor plans to invest about $2 billion in a new advanced packaging and test facility in Peoria, Arizona. When finished, it will employ about 2,000 people and will be the largest outsourced advanced packaging facility in the U.S. The first phase of the construction is expected to be completed and operational within two to three years. Synopsys p... » read more

Chip Industry Week In Review

By The SE Staff - 22 Nov, 2023 - Comments: 0

By Jesse Allen, Susan Rambo, and Liz Allan The U.S. government will invest about $3 billion for the National Advanced Packaging Manufacturing Program (NAPMP), including an advanced packaging piloting facility to help U.S. manufacturers adopt new technology and workforce training programs. It also will provide funding for projects concentrating on materials and substrates; equipment, tools, ... » read more

Chip Industry Week In Review

By The SE Staff - 17 Nov, 2023 - Comments: 0

By Jesse Allen, Karen Heyman, and Liz Allan Japan's Rapidus and the University of Tokyo are teaming up with France's Leti to meet its previously announced mass production goal of 2nm chips by 2027, and chips in the 1nm range in the 2030s. Rapidus was formed in 2022 with the support of eight Japanese companies — Sony, Kioxia, Denso, NEC, NTT, SoftBank, Toyota, and Mitsubishi's banking arm, ... » read more

Chip Industry Week In Review

By The SE Staff - 03 Nov, 2023 - Comments: 0

By Susan Rambo, Gregory Haley, Jesse Allen, and Liz Allan President Biden issued an executive order on the “Safe, Secure, and Trustworthy Development and Use of Artificial Intelligence.” It says entities need to report large-scale computing clusters and the total computing power available, including “any model that was trained using a quantity of computing power greater than 1,026 inte... » read more

Chip Industry Week In Review

By The SE Staff - 13 Oct, 2023 - Comments: 0

By Liz Allan, Jesse Allen, and Karen Heyman. Canon uncorked a nanoimprint lithography system, which the company said will be useful down to about the 5nm node. Unlike traditional lithography equipment, which projects a pattern onto a resist, nanoimprint directly transfers images onto substrates using a master stamp patterned by an e-beam system. The technology has a number of limitations and... » read more

Chip Industry Week In Review

By The SE Staff - 29 Sep, 2023 - Comments: 0

By Susan Rambo, Liz Allan, and Gregory Haley. TSMC rolled out the second version of its 3Dblox, which creates an infrastructure for stacking chiplets and other necessary components in a package, along with a standardized way of achieving that. Two novel features are chiplet mirroring for design reuse, and what is basically sandbox for power and thermal analysis of different design elements. ... » read more

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