Week In Review: Manufacturing, Test


Chipmakers and OEMs Apple has launched a new Apple Watch and iPad. Missing from the announcement was the iPhone 12, which may appear next month, according to Krish Sankar, an analyst at Cowen. What was interesting about this week’s announcement? Apple unveiled the iPad Air with the A14 Bionic, Apple’s most advanced chip. “Apple revealed the new 8th gen iPad (starting at $329) powered by ... » read more

Startup Funding: August 2020


Semiconductor startups were hot this month, with big funding going to designers and chip analytics. In automotive, one Chinese electric vehicle company raised another large round right before its IPO, and a LiDar maker's reverse merger gave it a cash infusion and set it on its own IPO road. Plus, a growing quantum computer developer saw a funding boost. This month, we feature 17 startups that c... » read more

RISC-V’s Expanding Footprint


Zdenek Prikryl, CTO of Codasip, sat down with Semiconductor Engineering to talk about the RISC-V market, where this open instruction set architecture (ISA) is gaining ground, and what are the biggest challenges in working with this technology. SE: Where do you see the value in RISC-V? Is it for off-the-shelf processors or more customized components? Prikryl: A few years ago, RISC-V was us... » read more

Week In Review: Design, Low Power


Tools & IP SiFive announced OpenFive, a self-contained and autonomous business unit that will offer custom silicon solutions with differentiated IP. OpenFive will be led by Dr. Shafy Eltoukhy, SVP, and general manager of OpenFive. OpenFive debuted with a new Die-to-Die (D2D) interface IP portfolio to serve next-generation chipset based designs for networking, HPC, and AI markets. The D2D p... » read more

Week In Review: Manufacturing, Test


Chipmakers At its Architecture Day this week, Intel disclosed its roadmap for the company’s next-generation microprocessors, graphics chips, FPGAs and other products. As part of the event, Intel announced some new enhancements for its existing 10nm finFET technology. Basically, it’s a mid-life kicker for the technology. Intel calls it the 10nm SuperFin technology, which is a redefinitio... » read more

Creating Better Models For Software And Hardware Verification


Semiconductor Engineering sat down to discuss what's ahead for verification with Daniel Schostak, Arm fellow and verification architect; Ty Garibay, vice president of hardware engineering at Mythic; Balachandran Rajendran, CTO at Dell EMC; Saad Godil, director of applied deep learning research at Nvidia; Nasr Ullah, senior director of performance architecture at SiFive. What follows are excerpt... » read more

Week In Review: Design, Low Power


Perforce Software acquired Methodics. Founded in 2006 and based in San Francisco, Methodics' IP lifecycle management and traceability software will join Perforce's larger portfolio of DevOps software that includes version control, Agile planning, and static code analysis. The two companies have had a strategic partnership in place with customers using software from both companies. Terms of the ... » read more

Simplifying And Speeding Up Verification


Semiconductor Engineering sat down to discuss what's ahead for verification with Daniel Schostak, Arm fellow and verification architect; Ty Garibay, vice president of hardware engineering at Mythic; Balachandran Rajendran, CTO at Dell EMC; Saad Godil, director of applied deep learning research at Nvidia; Nasr Ullah, senior director of performance architecture at SiFive. What follows are excerpt... » read more

What Will The Next-Gen Verification Flow Look Like?


Semiconductor Engineering sat down to discuss what's ahead for verification with Daniel Schostak, Arm fellow and verification architect; Ty Garibay, vice president of hardware engineering at Mythic; Balachandran Rajendran, CTO at Dell EMC; Saad Godil, director of applied deep learning research at Nvidia; and Nasr Ullah, senior director of performance architecture at SiFive. What follows are exc... » read more

Week In Review: Auto, Security, Pervasive Computing


Edge, cloud, data center Cadence added new verification IP (VIP) for hyperscalar data centers that supports CXL – Compute Express Link, HBM3, and Ethernet 802.3ck. The VIP are part of Cadence’s Verification Suite. Cadence also released IP for 56G long-reach SerDes on TSMC’s N7 and N6 process technologies. Many Mentor, a Siemens Business, IC design tools are now certified TSMC’s N5 a... » read more

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