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Efficacy of Transistor Interleaving in DICE Flip-Flops at a 22 nm FD SOI Technology Node


New research paper from University of Saskatchewan, with funding by NSERC and the Cisco University Research Program. Abstract "Fully Depleted Silicon on Insulator (FD SOI) technology nodes provide better resistance to single event upsets than comparable bulk technologies, but upsets are still likely to occur at nano-scale feature sizes, and additional hardening techniques should be explor... » read more

Silicon Thermo-Optic Switches with Graphene Heaters Operating at Mid-Infrared Waveband


Abstract "The mid-infrared (MIR, 2–20 μm) waveband is of great interest for integrated photonics in many applications such as on-chip spectroscopic chemical sensing, and optical communication. Thermo-optic switches are essential to large-scale integrated photonic circuits at MIR wavebands. However, current technologies require a thick cladding layer, high driving voltages or may introduce h... » read more