Week In Review: Semiconductor Manufacturing, Test


The CHIPS for America team at the U.S. Department of Commerce named the selection committee who will select board members for the nonprofit entity that will likely be managing the National Semiconductor Technology Center (NSTC). Members include John Hennessy, chairman of Alphabet; Jason Matheny, president and CEO of the RAND Corporation; Don Rosenberg, fellow in residence at UCSD’s School of ... » read more

AI-Powered Verification


With functional verification consuming more time and effort than design, the chip industry is looking at every possible way to make the verification process more effective and more efficient. Artificial intelligence (AI) and machine learning (ML) are being tested to see how big an impact they can have. While there is progress, it still appears to be just touching the periphery of the problem... » read more

The Challenge Of RISC-V Compliance


The open-source RISC-V instruction set architecture (ISA) continues to gain momentum, but the flexibility of RISC-V creates a problem—how do you know if a RISC-V implementation fits basic standards and can play well with other implementations so they all can run the same ecosystem? In addition, how do you ensure that ecosystem development works for all implementations and that all cores that ... » read more

Week in Review: Design, Low Power


The U.S. Department of Energy (DOE) has awarded $35 million for 12 projects involving ultra-efficient power management. Called Arpa-E, the program encouraged participants to use medium-voltage electricity in new ways with real-world applications, such as industry, transportation and the grid. The top two award winners were Eaton Corp. (Arden, NC) for its DC wide-bandgap static circuit breaker, ... » read more