RISC-V Micro-Architectural Verification

By Brian Bailey - 21 Dec, 2023 - Comments: 3

RISC-V processors are garnering a lot of attention due to their flexibility and extensibility, but without an efficient and effective verification strategy, buggy implementations may lead to industry problems. Prior to RISC-V, processor verification almost became a lost art for most semiconductor companies. Expertise was condensed into the few commercial companies that provided processors or... » read more

Chip Backdoors: Assessing the Threat

By Jeff Goldman - 04 Aug, 2022 - Comments: 0

In 2018, Bloomberg Businessweek made an explosive claim: Chinese spies had implanted backdoors in motherboards used by some high-profile customers, including the U.S. Department of Defense. All of those customers issued strongly worded denials. Most reports of hardware backdoors have ended up in exchanges like these. There are allegations and counter-allegations about specifics. But as hardw... » read more

Power/Performance Bits: May 4

By Jesse Allen - 04 May, 2021 - Comments: 0

Speculative execution vulnerable again Computer scientists from the University of Virginia and University of California San Diego warn of a processor architecture vulnerability that gets around the techniques used to secure processors in the wake of Spectre. In 2018, Spectre and the similar Meltdown vulnerability were announced. These types of attacks could allow malicious agents to exploit... » read more

Securing ICs With Information Flow Analysis

By Ed Sperling - 16 Feb, 2021 - Comments: 0

Following the data has new meaning when it comes to security. Alric Althoff, senior hardware security engineer at Tortuga Logic, talks about tracking the flow of data through a hardware design over time, including what happens with roots of trust, how this works with existing tools and methodologies, and what to think about when tracing potential security risks. » read more

Why It’s So Hard To Create New Processors

By Brian Bailey - 26 Mar, 2020 - Comments: 1

The introduction, and initial success, of the RISC-V processor ISA has reignited interest in the design of custom processors, but the industry is now grappling with how to verify them. The expertise and tools that were once in the market have been consolidated into the hands of the few companies that have been shipping processor chips or IP cores over the past 20 years. Verification of a pro... » read more

New Approaches For Hardware Security

By Ed Sperling - 01 Aug, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss a wide range of hardware security issues and possible solutions with Norman Chang, chief technologist for the Semiconductor Business Unit at ANSYS; Helena Handschuh, fellow at Rambus, and Mike Borza, principal security technologist at Synopsys. What follows are excerpts of that conversation. (L-R) Norman Chang, Helena Handschuh, Mike Borza. Pho... » read more

Power/Performance Bits: May 21

By Jesse Allen - 21 May, 2019 - Comments: 0

More speculative vulnerabilities Security researchers at the Graz University of Technology, KU Leuven, Cyberus Technology, and Worcester Polytechnic Institute point to two new speculative execution vulnerabilities related to Meltdown and Spectre. The first, which they dubbed ZombieLoad, uses a similar approach to Meltdown. After preparing tasks in parallel, the processor needs to discard th... » read more

The Next Spoiler Alert

By Ed Sperling - 07 Mar, 2019 - Comments: 0

Speculative execution seemed like a good idea at the time. As the power/performance benefits of each node shrink began to dwindle, companies like Intel figured out ways to maintain processor speeds at the same or lower power. There were other approaches, as well. Speculative execution and branch prediction are roughly equivalent to pre-fetch in search, which has gotten so good that often the... » read more

IoT Merging Into Data-Driven Design

By Ed Sperling and Kevin Fogarty - 10 Jan, 2019 - Comments: 0

The Internet of Things is becoming more difficult to define and utilize for an effective business strategy. While an increasing number devices send data to the cloud or some local server, so much data is being generated and moved around that new strategies are being developed to rethink what needs to be processed where. Back in 2013, when the IoT concept really began taking off, connectivity... » read more

Chip Industry In Rapid Transition

By Ed Sperling - 09 Jan, 2019 - Comments: 0

Wally Rhines, CEO Emeritus at Mentor, a Siemens Business, sat down with Semiconductor Engineering to talk about global economics, AI, the growing emphasis on customization, and the impact of security and higher abstraction levels. What follows are excerpts of that conversation. SE: Where do you see the biggest changes happening across the chip industry? Rhines: 2018 was a hot year for fab... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?