Chip Industry Week In Review

By The SE Staff - 16 Feb, 2024 - Comments: 0

By Susan Rambo, Karen Heyman, and Liz Allan. Renesas plans to acquire Altium, maker of PCB design software, for $5.9 billion. In a conference call, Renesas CEO Hidetoshi Shibata cited Altium's PCB design software and digital twin virtual modeling as key components of its future strategy. "I believe it will generate transformational value for our combined customers and our stakeholders," Shib... » read more

Academic Research Paper Round-Up: April 13

By Linda Christensen - 13 Apr, 2022 - Comments: 0

The volume of research into advanced semiconductors is rising and widening. The latest batch includes hybrid power-gating architecture, RRAM devices models, improved FMEA, quantum machine learning, enhanced nonlinear optics, harvesting energy after sundown, direct chemisorption-assisted nanotransfer printing, and more. Topping the list of researchers this week are ETH Zurich, Stanford Unive... » read more

Graphene oxide 2D films integrated with nanowires and ring resonators for enhanced nonlinear optics

By Technical Paper Link - 12 Apr, 2022 - Comments: 0

New research paper from Optical Sciences Centre, Swinburne University of Technology. Abstract "We report enhanced nonlinear optics in nanowires, waveguides, and ring resonators by introducing layered two-dimensional (2D) graphene oxide (GO) films through experimental demonstration. The GO films are integrated on silicon-on-insulator nanowires (SOI), high index doped silica glass, and sili... » read more

Power/Performance Bits: Nov. 30

By Jesse Allen - 30 Nov, 2021 - Comments: 0

Universal decoding algorithm Researchers at MIT, Boston University, and Maynooth University built a silicon chip that is able to decode any error-correcting code, regardless of its structure, with maximum accuracy, using a universal decoding algorithm called Guessing Random Additive Noise Decoding (GRAND). Encoded data traveling over a network is susceptible to noise, which disrupts the sig... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.

by Ed Sperling

tag: Swinburne University of Technology

Chip Industry Week In Review

Academic Research Paper Round-Up: April 13

Graphene oxide 2D films integrated with nanowires and ring resonators for enhanced nonlinear optics

Power/Performance Bits: Nov. 30

Trending Articles

NAND Flash Targets 1,000 Layers

One Chip Vs. Many Chiplets

FOPLP Gains Traction in Advanced Semiconductor Packaging

HBM Options Increase As AI Demand Soars

Asia Government Funding Surges

Knowledge Centers
Entities, people and technologies explored

Related Articles

Shift Left Is The Tip Of The Iceberg

Partitioning In The Chiplet Era

NAND Flash Targets 1,000 Layers

3.5D: The Great Compromise

AI’s Role In Chip Design Widens, Drawing In New Startups

What Comes After HBM For Chiplets

Memory Fundamentals For Engineers

New AI Processors Architectures Balance Speed With Efficiency

Sponsors

Recent Comments

About

Navigation

Connect With Us

tag: Swinburne University of Technology

Chip Industry Week In Review

Academic Research Paper Round-Up: April 13

Graphene oxide 2D films integrated with nanowires and ring resonators for enhanced nonlinear optics

Power/Performance Bits: Nov. 30

Trending Articles

NAND Flash Targets 1,000 Layers

One Chip Vs. Many Chiplets

FOPLP Gains Traction in Advanced Semiconductor Packaging

HBM Options Increase As AI Demand Soars

Asia Government Funding Surges

Knowledge Centers Entities, people and technologies explored

Related Articles

Shift Left Is The Tip Of The Iceberg

Partitioning In The Chiplet Era

NAND Flash Targets 1,000 Layers

3.5D: The Great Compromise

AI’s Role In Chip Design Widens, Drawing In New Startups

What Comes After HBM For Chiplets

Memory Fundamentals For Engineers

New AI Processors Architectures Balance Speed With Efficiency

Sponsors

Newsletter Signup

Popular Tags

Recent Comments

About

Navigation

Connect With Us

Knowledge Centers
Entities, people and technologies explored