ESD Requirements Are Changing


Standards for specifying a chip’s ability to withstand electrostatic discharge (ESD) are changing – in some cases, getting tougher, and in others, easing up. ESD protection has been on a path from a one-size-fits-all approach to one where a signal’s usage helps to determine what kind of protection it should get. Protecting chips from ESD damage has been a longstanding part of IC design... » read more

Scaling At The Angstrom Level


It now appears likely that 2nm will happen, and possibly the next node or two beyond that. What isn't clear is what those chips will be used for, by whom, and what they ultimately will look like. The uncertainty isn't about the technical challenges. The semiconductor industry understands the implications of every step of the manufacturing process down to the sub-nanometer level, including ho... » read more

Disaggregation Of The SoC


The rise of edge computing could do to the cloud what the PC did to the minicomputer and the mainframe. In the end, all of those co-existed (despite the fact that the minicomputer morphed into commodity servers from companies like Dell and HP). What's different this time around is that the computing done inside of those boxes is moving. It is being distributed in ways never considered feasi... » read more

Why EV Battery Design Is So Difficult


Automotive batteries always have been treated as plug-and-play parts of a vehicle, but that approach no longer works in electric vehicles. In fact, the battery is now a differentiating factor, and it is the heaviest and most expensive component. What used to be a relatively simple component has been replaced by a variety of sensors to measure complex static thermal and aging effects, as well... » read more

Determining Where Power Analysis Matters Most


How much accuracy is required in every stage of power analysis is becoming a subject of debate, as engineering teams wrestle with a mix of new architectures, different use cases and increasing pressure to get designs out on time. The question isn't whether power is a critical factor in designs anymore. That is a given. It is now about the most efficient way to tackle those issues, as well as... » read more

Are Digital Twins Something For EDA To Pursue?


‘Digital Twins’ are one of the new, fashionable key concepts for system developers, but do they fit with EDA? How many different types of engines do these twins run on – abstract simulation, signal-based RTL simulation, emulation, prototyping, actual silicon? What should the use models be called for digital twinning – like reproduction of bugs from silicon in emulation? Or optimizing th... » read more

Partitioning Drives Architectural Considerations


Semiconductor Engineering sat down to discuss partitioning with Raymond Nijssen, vice president of system engineering at Achronix; Andy Ladd, CEO at Baum; Dave Kelf, chief marketing officer at Breker; Rod Metcalfe, product management group director in the Digital & Signoff Group at Cadence; Mark Olen, product marketing group manager at Mentor, a Siemens Business; Tom Anderson, technical mar... » read more

5G OTA Test Not Ready For Production


5G is poised to dominate the wireless world, but over-the-air (OTA) testing of 5G beamforming antennas is still not ready for volume production. Beamforming is a critical element in the millimeter wave version of 5G, because of the limitations of ultra-high-frequency signals. Unlike 4G and its predecessors, millimeter wave technology will not penetrate objects, so signals need to be directed... » read more

HW/SW Design At The Intelligent Edge


Adding intelligence to the edge is a lot more difficult than it might first appear, because it requires an understanding of what gets processed where based on assumptions about what the edge actually will look like over time. What exactly falls under the heading of Intelligent Edge varies from one person to the next, but all agree it goes well beyond yesterday’s simple sensor-based IoT dev... » read more

How Far Can AI Go?


AI is everywhere. There are AI/ML chips, and AI is being used to design and manufacture chips. On the AI/ML chip side, large systems companies and startups are striving for orders of magnitude improvements in performance. To achieve that, design teams are adding in everything from CPUs, GPUs, TPUs, DSPs, as well as small FPGAs and eFPGAs. They also are using small memories that can be read i... » read more

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