tag: Tensilica

Optimizing IP For Power
By Ed Sperling - 11 Apr, 2013 - Comments: 0

By Ed Sperling As the amount of commercial IP in an SoC increases, the entire bill of materials is coming under increasing scrutiny because of a new concern—power. Commercial IP, after all, is largely a collection of black-box solutions to speed up the time it takes to bring a chip to market, and frequently to improve the quality, but the cumulative impact on the system power budget has neve... » read more

Executive Briefing: Lip-Bu Tan
By Ed Sperling - 11 Apr, 2013 - Comments: 0

By Ed Sperling LPHP: From a high level, what are your customers doing differently these days? Tan: What system companies are looking for is time-to-market and differentiation. They want to differentiate on specific functions. IT has become very important in this process. And in terms of tools, they are looking for end-to-end solutions. Besides the advanced nodes and IP blocks, they are starti... » read more

Moore’s Law 2.0
By Ed Sperling - 14 Mar, 2013 - Comments: 0

By Ed Sperling Doubling the number of transistors on a piece of silicon every 18 to 24 months used to be synonymous with engineering progress, but as the semiconductor world migrates from processors to SoCs the fundamental basis of Moore’s Law is losing its meaning. Even its famous timetable is slipping. For one thing, it’s simply too expensive and difficult to migrate from one node to ... » read more

Version Control
By Ed Sperling - 14 Mar, 2013 - Comments: 0

By Ed Sperling & Ann Steffora Mutschler One of the biggest impediments to progress in semiconductor design is progress itself—version after version of specifications, formats and increasingly IP. In fact, there are so many different versions, some of which conflict directly with each other, that it may take months or even years before some customers adopt new products. Much has ... » read more

Let The IP Wars Begin
By Ed Sperling - 14 Mar, 2013 - Comments: 0

y Ed Sperling Nature abhors a vacuum. Customers abhor a monopoly. It appears both problems are now being solved in the EDA world—assuming approval by regulatory agencies, of course. There have been two concerns facing chipmakers in regards to third-party IP. One is political. Most large companies spent millions of dollars and thousands of frustrating man-hours developing their own interna... » read more

Raising The Stakes For IP
By Ed Sperling - 14 Feb, 2013 - Comments: 0

By Ed Sperling As the amount of IP in an SoC increases, so do the number of players who want to strengthen their position in this market. The big acquisitions that began several years ago over time have proved to be just opening salvos—something that was impossible to predict when this shift began. Synopsys’ purchase of Virage Logic and Cadence’s purchase of Denali, both of which occu... » read more

Experts At The Table: Latency
By Ed Sperling - 01 Feb, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance engineering sat down to discuss latency with Chris Rowen, CTO at Tensilica; Andrew Caples, senior product manager for Nucleus in Mentor Graphics’ Embedded Software Division; Drew Wingard, CTO at Sonics; Larry Hudepohl, vice president of hardware engineering at MIPS; and Barry Pangrle, senior power methodology engineer at Nvidia. What follows are exce... » read more

Experts At The Table: Latency
By Ed Sperling - 25 Jan, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance engineering sat down to discuss latency with Chris Rowen, CTO at Tensilica; Andrew Caples, senior product manager for Nucleus in Mentor Graphics’ Embedded Software Division; Drew Wingard, CTO at Sonics; Larry Hudepohl, vice president of hardware engineering at MIPS; and Barry Pangrle, senior power methodology engineer at Nvidia. What follows are exce... » read more

It’s Transition Time Again
By Ed Sperling - 17 Jan, 2013 - Comments: 0

By Ed Sperling After decades of shrinking features, developing new software on every level and engineering huge improvements in energy efficiency and performance, the semiconductor industry has reached a crossroads. To get to the next level will require massive improvements on all fronts, but not all consumers will be willing to pay for them. For example, if a battery lasts an entire day f... » read more

Experts At The Table: Latency
By Ed Sperling - 17 Jan, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance engineering sat down to discuss latency with Chris Rowen, CTO at Tensilica; Andrew Caples, senior product manager for Nucleus in Mentor Graphics’ Embedded Software Division; Drew Wingard, CTO at Sonics; Larry Hudepohl, vice president of hardware engineering at MIPS; and Barry Pangrle, senior power methodology engineer at Nvidia. What follows are exce... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy