Week In Review: Manufacturing, Test

By Mark LaPedus - 31 Jul, 2020 - Comments: 0

Chipmakers and OEMs As reported, Intel this week reorganized its operations following delays with its 7nm technology. Intel is behind TSMC and Samsung in technology. As a result, TSMC’s foundry customers, such as AMD, Nvidia and others, are also pulling ahead of Intel. In addition, reports have surfaced that Intel will outsource some of its leading-edge chip production to TSMC. To solve t... » read more

3D NAND Metrology Challenges Growing

By Mark LaPedus - 09 Apr, 2019 - Comments: 8

3D NAND vendors face several challenges to scale their devices to the next level, but one manufacturing technology stands out as much more difficult at each turn—metrology. Metrology, the art of measuring and characterizing structures, is used to pinpoint problems and ensure yields for all chip types. In the case of 3D NAND, the metrology tools are becoming more expensive at each iteration... » read more

What’s Next For DNA Chips?

By Mark LaPedus - 11 Dec, 2014 - Comments: 0

The field of genomic personalized medicine is an emerging and promising area. Using lab systems called DNA sequencers, these units could provide vital information about an individual’s genetic makeup. In this area, several companies are developing next-generation DNA sequencers, built around CMOS-based semiconductor technology. But CMOS-based DNA sequencing chips, and the competing techno... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Thermo Fisher

Week In Review: Manufacturing, Test

3D NAND Metrology Challenges Growing

What’s Next For DNA Chips?