tag: timing side channels

A New Architecture And Verification Approach For Hardware Security Modules
By Technical Paper Link - 31 Oct, 2023 - Comments: 0

A technical paper titled “The K2 Architecture for Trustworthy Hardware Security Modules” was published by researchers at MIT Computer Science and Artificial Intelligence Laboratory (CSAIL) and New York University. Abstract: "K2 is a new architecture and verification approach for hardware security modules (HSMs). The K2 architecture's rigid separation between I/O, storage, and computation ... » read more

A Formal Verification Method To Detect Timing Side Channels In MCU SoCs
By Technical Paper Link - 11 Oct, 2023 - Comments: 0

A technical paper titled “A New Security Threat in MCUs – SoC-wide timing side channels and how to find them” was published by researchers at University of Kaiserslautern-Landau and Stanford University. Abstract: "Microarchitectural timing side channels have been thoroughly investigated as a security threat in hardware designs featuring shared buffers (e.g., caches) and/or parallelism b... » read more

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