Optimizing Oxide Interfaces To Preserve Device Performance in TMDC-based Transistors (imec, ETH Zurich)


A new technical paper, "Oxide induced degradation in MoS2 field-effect transistors," was published by researchers at imec and ETH Zurich. Abstract excerpt "Transition Metal Dichalcogenides (TMDC) are promising candidates for future scaled transistor channels but their performance is often degraded by imperfections such as the interface with amorphous gate oxides. This study examines how amo... » read more

300mm Fab-Compatible Integration Flow for Planar 2D FETs (imec, KU Leuven)


Imec and KU Leuven researchers published "Integration and electrical evaluation of WS2 and MoS2 fets in a 300 mm pilot line." Abstract "2D materials have the potential to extend and augment the CMOS scaling roadmap. However, upscaling from lab-based demonstrators to 300 mm-compatible integration modules presents unique challenges. In this work, we address these challenges through ... » read more

Device Architecture For 2D Material-Based mNS-FETs In Sub-1nm Nodes (Sungkyunkwan Univ., Alsemy)


A new technical paper titled "Exploring optimal TMDC multi-channel GAA-FET architectures at sub-1nm nodes" was published by researchers at Sungkyunkwan University and Alsemy Inc. "This paper explores the design and optimization of multi-Nanosheet Field-Effect Transistors (mNS-FETs) employing a Transition Metal Dichalcogenide (TMDC) channel, specifically MoS2, for the 0.7 nm technology node u... » read more

Overview Of The State Of Semiconducting TMDC Research


A technical paper titled "Potential of Transition Metal Dichalcogenide Transistors for Flexible Electronics Applications" was published by researchers at Advanced Microelectronic Center Aachen (AMICA), RWTH Aachen University, and Bergische Universität Wuppertal. Abstract: "Semiconducting transition metal dichalcogenides (TMDC) are 2D materials, combining good charge carrier mobility, ultimat... » read more

Power/Performance Bits: Nov. 30


Universal decoding algorithm Researchers at MIT, Boston University, and Maynooth University built a silicon chip that is able to decode any error-correcting code, regardless of its structure, with maximum accuracy, using a universal decoding algorithm called Guessing Random Additive Noise Decoding (GRAND). Encoded data traveling over a network is susceptible to noise, which disrupts the sig... » read more