Week In Review: Manufacturing, Test

By Karen Heyman - 25 Aug, 2023 - Comments: 0

Intel aims to quadruple capacity for its most advanced chip packaging services by 2025, including with a new facility in Malaysia, per Nikkei Asia. Huawei is building a collection of secret semiconductor fabrication facilities across China to let the company skirt U.S. sanctions, SIA warned in a presentation seen by Bloomberg. It’s acquired at least two existing plants and is building at l... » read more

Research Bits: March 28

By Susan Rambo - 28 Mar, 2023 - Comments: 0

Modeling how the nose smells The first 3D molecular-level picture of how an odor molecule binds to and activates an odorant receptor (OR) on olfactory cells in the nose may help us understanding and eventually be used to build a map of all the receptors. Scientists at UC San Francisco (UCSF) used cryo-electron microscopy (cryo-EM), which UCSF developed, to take a moving picture of the wiggly r... » read more

COVID-19 Tech Bits

By Linda Christensen - 06 Apr, 2020 - Comments: 0

Tech companies, consortiums and universities are jumping in to help fight COVID-19, deploying everything from massive computing capabilities to developing new technologies that can protect medical workers and first responders. Nearly all of these have ramped up over the past several weeks, as the tech world begins to take on a global challenge to combat the deadly virus. Compute resources... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: UCSF

Week In Review: Manufacturing, Test

Research Bits: March 28

COVID-19 Tech Bits