Potential of AOS Memories As A High-Performance SRAM Substitute (Georgia Tech, U. of Virginia)


A new technical paper titled "Optimization and Benchmarking of Monolithically Stackable Gain Cell Memory for Last-Level Cache" was published by researchers at Georgia Institute of Technology and University of Virginia. Abstract: "The Last Level Cache (LLC) is the processor's critical bridge between on-chip and off-chip memory levels - optimized for high density, high bandwidth, and low oper... » read more

Achieving Your Low Power Goals With Synopsys Ultra Low Leakage IO


The demand for low power design has intensified with shrinking geometries. At the same time, innovation in battery operated, handheld devices has increased the design complexity by adding more and more functionality. The focus is on power-optimized designs while maintaining low cost and reduced risk. Designers face these complex and contradictory challenges: developing products with the lowest ... » read more