Data Leakage Becoming Bigger Issue For Chipmakers

By Ed Sperling - 04 May, 2023 - Comments: 0

Data leakage is becoming more difficult to stop or even trace as chips become increasingly complex and heterogeneous, and as more data is stored and utilized by chipmakers for other designs. Unlike a cyberattack, which typically is done for a specific purpose, such as collecting private data or holding a system ransom, data leaks can spring up anywhere. And as the value of data increases, th... » read more

Efficient Trace In RISC-V

By Ed Sperling - 19 Dec, 2022 - Comments: 0

Systems with RISC-V cores often include multiple types of other processors and accelerators. Peter Shields, product manager for Tessent at Siemens Digital Industries Software, talks about what's needed for debug and trace in context, including the need for unobtrusive observation at full speed, what to trace and when to trace it, and how embedded IP can identify to report which branches are tak... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 10 Sep, 2021 - Comments: 0

Automotive Intel’s Mobileye and Sixt SE said they are collaborating on an autonomous ride-hailing services in Munich in 2022. Mobileye will own the robotaxi fleet. Mobileye also recently unveiled its electric autonomous vehicle (AV), which it will use in ridehailing in Munich and Tel Aviv.. To increase the supply of automotive chips, Intel said it will build new chip manufacturing facilit... » read more

Blog Review: Aug. 12

By Jesse Allen - 12 Aug, 2020 - Comments: 0

Arm's Greg Yeric takes a look at what semiconductor manufacturing might look like in 2030 as the price of equipment rises and possibilities for when the next upgrade to EUV, high numerical aperture, eventually runs out of steam. Synopsys' Taylor Armerding explains the difference between bugs and security flaws and why it's so important to pay attention to potential problems in a design's spe... » read more

Designer And IP Tracks Swell With Focus On ML, Security And Traditional EDA Methodologies

By Michelle Clancy - 13 Jul, 2020 - Comments: 0

What are designers keenly interested in as the 57th Design Automation Conference (DAC) approaches? If you said machine learning (ML), you’d be only partially right. Based on designer and IP tracks submissions to the 57th edition of the venerable electronics-industry event, ML – how to design with it and optimize EDA tools and flows using it – is a hot topic. But so too are more traditi... » read more

Week In Review: Design, Low Power

By Jesse Allen - 26 Jun, 2020 - Comments: 0

Siemens will acquire UltraSoC, a provider of embedded analytics and monitoring solutions for applications including cybersecurity and functional safety. Founded in 2006 and based in Cambridge, U.K., the company's technology will be integrated into the Xcelerator portfolio as part of Mentor’s Tessent software product suite where it will form part of a ‘Design for Lifecycle Management’ stra... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 26 Jun, 2020 - Comments: 0

Security The U.S. Defense Advanced Research Projects Agency (DARPA) selected Synopsys as the main contractor to provide SoC design tools and security IP for its Automatic Implementation of Secure Silicon (AISS) program. The four-year program’s goal to develop a design tool and IP ecosystem to automate adding security into integrated circuits. Synopsys will be working on a research team with ... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 19 Jun, 2020 - Comments: 0

Security Many IoT devices have some of the 19 bugs known as Ripple20 vulnerabilities. Researchers JSOF discovered the security flaws in library produces by Treck, Inc., which is used in many IoT devices. Edge, cloud, data center Rambus delivered its 112G XSR/USR PHY IP on TSMC 7nm process (N7). The SerDes PHY was designed for chiplets and co-packaged optics (CPO) architectures that are des... » read more

Week In Review: Design, Low Power

By Jesse Allen - 05 Jun, 2020 - Comments: 1

Tools & IP Synopsys introduced its DesignWare USB4 IP solution consisting of controllers, routers, PHYs, and verification IP. It supports USB4, DisplayPort with HDCP 2.3 security, PCI Express, and Thunderbolt 3 connectivity protocols through USB Type-C connectors and cables. The USB4 IP operates at up to 40 Gbps, twice the maximum data rate of USB 3.2, and is backwards compatible with USB 3... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 05 Jun, 2020 - Comments: 0

Edge, cloud, data center Synopsys launched its USB4 IP and tools, already with a successful tapeout of a USB4 PHY test chip on 5nm advanced FinFET process. The Designware USB4 IP’s throughput is up to 20 or 40 Gbps, which Synopsys says is the bandwidth needed for high-performance edge AI, storage, PC, and tablet SoC designs. Also, Samsung Foundry certified Synopsys’ Design Compiler NXT for ... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: UltraSoC

Data Leakage Becoming Bigger Issue For Chipmakers

Efficient Trace In RISC-V

Week In Review: Auto, Security, Pervasive Computing

Blog Review: Aug. 12

Designer And IP Tracks Swell With Focus On ML, Security And Traditional EDA Methodologies

Week In Review: Design, Low Power

Week In Review: Auto, Security, Pervasive Computing

Week In Review: Auto, Security, Pervasive Computing

Week In Review: Design, Low Power

Week In Review: Auto, Security, Pervasive Computing