RISC-V decoupled Vector Processing Unit (VPU) For HPC

A technical paper titled "Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications" was published by researchers at Barcelona Supercomputing Center, Spain. "The maturity level of RISC-V and the availability of domain-specific instruction set extensions, like vector processing, make RISC-V a good candidate for supporting the integration of ... » read more