tag: wafers

Wafer Leaders Extend Basis for Global SOI Supply
By Various Writers - 16 Oct, 2012 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ It’s a bright green light from the world leaders in SOI wafer capacity. Soitec, the world leader in SOI wafer production, and long-time partner Shin-Etsu Handatai (SEH), the world’s biggest producer of silicon wafers, have extended their licensing agreement and expanded their technology cooperation. SEH is a $12... » read more

What’s ST’s FD-SOI Technology All About?
By Various Writers - 22 Jun, 2012 - Comments: 0

As I blogged here on SemiMD last week, STMicroelectronics has announced that to supplement in-house production at their fab in Crolles, the company has tapped GlobalFoundries for high-volume production of 28nm then 20nm FD-SOI mobile devices.  ST will also open access to its FD-SOI technology to GlobalFoundries’ other customers.  High-volume manufacturing will kick off with ST-Ericsson’s ... » read more

Chenming Hu: SOI Can Empower New Transistors to 10nm and beyond
By Various Writers - 30 May, 2012 - Comments: 0

The following is a special guest post by Dr. Chenming Hu, TSMC Distinguished Professor at UC Berkeley. He and his team published seminal papers on FinFETs (1999) and UTB-SOI (2000). This post first appeared as part of the Advanced Substrate News special edition on FD-SOI industrialization.  ~~ The good, old MOSFET is nearing its limits. Scaling issues and dopant-induced variations ... » read more

Soitec’s Wafer Roadmap for Fully Depleted Planar and 3D/FinFET
By Various Writers - 24 May, 2012 - Comments: 0

The following is a special guest post by Steve Longoria, Senior VP of Worldwide Business Development at Soitec.  It first appeared as part of the Advanced Substrate News special edition on FD-SOI industrialization. ~~ Today’s semiconductor industry is moving through several challenging transitions that are creating a significant opportunity for Soitec to bring incremental value to th... » read more

CMP, ST et al offer 28nm FD-SOI for prototyping, research
By Various Writers - 06 Nov, 2011 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ What would a port to 28nm FD-SOI do for your design?  A recent announcement by CMP, STMicroelectronics and Soitec invites you to find out.  Specifically, ST’s CMOS 28nm Fully Depleted Silicon-On-Insulator (FD-SOI) process – which uses innovative silicon substrates from Soitec and incorporates robust, compact model... » read more

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