Options Widen For Optimizing IoT Designs

By John Koon - 29 Mar, 2023 - Comments: 0

Creating a successful IoT design requires a deep understanding of the use cases, and a long list of tradeoffs among various components and technologies to provide the best solution at the right price point. Maximizing features and functions while minimizing costs is an ongoing balancing act, and the number of choices can be overwhelming. The menu includes SoC selection, OS and software proto... » read more

Power Grids Under Attack

By John Koon - 03 Feb, 2022 - Comments: 0

Cyberattacks are becoming as troublesome to the electrical power grid as natural disasters, and the problem is growing worse as these grids become more connected and smarter. Unlike in the past, when a power outage affected just the electricity supplied to homes and businesses, power grids are becoming core elements of smart cities, infrastructure, and safety-related services. Without power,... » read more

Improving Power Efficiency In Ultra-Low Power Designs

By John Koon - 11 Nov, 2021 - Comments: 0

Faster data communications in phones and data centers grabs headlines, but many applications don't require the continuous, high-data-rate communications needed for video streaming or image processing. In fact, for many devices, designing for better performance results in wasted energy and sharply curtails the time between battery charges. That is especially true for machine-to-machine (M2M) ... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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Options Widen For Optimizing IoT Designs

Power Grids Under Attack

Improving Power Efficiency In Ultra-Low Power Designs