The Problem With Proximity

SoC engineers used to think of the silicon as the end of their troubles. Not anymore.


By Ed Sperling
At 90nm companies had to begin thinking seriously about how the signals inside a chip would begin interfering with each other. At 40nm and beyond, they have to consider how signals are interfering with each other across an entire device that may include multiple SoCs.

This marks an interesting shift in what companies have been calling holistic design for the better part of a decade. In the past, holistic design was considered the chip and the software. It now needs to include all of that, the IP, and the other components within an end-user device.

“As you lower the voltage the amount of radiation has less power, but as you raise the frequency you create different radiation in different frequency bands,” said Wally Rhines, chairman and CEO of Mentor Grpahics. “So there’s the on-chip issue of interference and cross-talk. On printed circuit boards we’ve had automated routing software that reduces cross-coupling by differential pair routing to improve signal integrity. That’s been in the software for a decade. But if you look at the revenue for the printed circuit board business, signal integrity and power integrity have gone from being negligible to being a substantial perception of the business.”

Where there is business there are problems, and the problems are growing by the process node. At 32nm and 28nm, which companies are just beginning to explore, the proximity issues are rampant.

“You also have gigabit signals on these boards and serialize and deserialize,” Rhines said. “If the 64-bit bus is replaced by a serial link, it runs at a pretty high frequency.”

History repeats
Ever since computer processors hit clock speeds of 1GHz there have been dire warnings about interference. At that frequency, computer makers had to certify they wouldn’t interfere with the communications systems of airplanes. Shielding components inside a computer has a long history.

Cell phones have their own long history, in part because of the radiation from the phones and in part to reduce cross talk and other electromagnetic interference.

“For some time, people have been spending a lot of time shielding critical signals in an SoC,” said Brani Buric, executive vice president at Virage Logic. “There is also process of shielding to avoid the negative effects of close proximity to the SoC. This has been done for a couple of generations inside the SoC, but it hasn’t been done much outside the SoC. But with higher frequencies you need to provide a methodology for electromigration.”

He noted that every interconnect now requires a very detailed signal integration and noise analysis, plus the ability to do adjustments in the design once engineers fully understand the environment and the interactions.

The price of progress
But it also requires a willingness to do that kind of analysis. Dian Yang, senior vice president of product management at Apache Design Systems, said economics are working against the investment in shielding in some products.

“A TV board may have 3,000 capacitors that cost $30, but if the margin on the TV is only $30 that doesn’t work. So they either buy a cheaper chip and keep the capacitors or they buy a more expensive chip and board. That becomes an architectural decision. It’s the same for the package. Do they add more layers?”

All of these cost considerations have an effect on the overall design because they also affect shielding. Fewer smaller devices on a board and smaller boards can reduce the overall power consumption. But there’s less room for shielding, as well.

There’s also less room for countering effects in advanced designs that shrink the margin in SoC designs, which is a prerequisite with some of the restrictive design rules handed down by foundries. Guardbanding makes chips more costly, lowers performance and increases power consumption. But it does sometimes compensate for proximity effects.

To a large extent, shielding also is a function of the companies developing chips and devices. Virage’s Buric says there are three distinct types of companies working in this market. The first uses companies like eSilicon or Open-Silicon to develop chips for them, and they have plenty of experience dealing with these kinds of effects. The second involves big integrated device manufacturers, which also are skilled in this area.

“The most exposed are the fabless companies, particularly those with enough interest to do it in-house but not enough expertise,” he said. And while Virage has been working with some of those companies, no one really knows how many are falling through the cracks.

Leave a Reply

(Note: This name will be displayed publicly)