The Week In Review: Design/IoT

TSMC certifications; Arteris interconnect v3; Mentor safety-certified RTOS; Barco Silex partners with Rambus; NXP sets up V2X lab at Singapore university.


TSMC certified a number of tools for its current 10nm FinFET design rules and SPICE models and 16nm FinFET Plus (16FF+) V1.0 process, including: Ansys’ power integrity and electromigration tools; Cadence’s custom/analog and digital implementation and signoff tools; Mentor Graphics’ physical verification, design for manufacturing, and circuit verification tools; and Synopsys’ full suite of digital, signoff and custom implementation tools.

Arteris unveiled version 3 of its FlexNoC interconnect fabric IP. New features include a switch-based topology editor, topic- and activity-based user interface, and NoC composition enhancements.

Embedded Systems
Mentor Graphics uncorked a safety-certified version of the Nucleus real-time operating system which meets safety and reliability requirements for industrial, medical, and airborne systems.

Rambus inked a deal with Barco Silex, which will utilize Rambus Cryptography Research differential power analysis countermeasure technology in its solutions for the point-of-sale market.

NXP inked a deal with Singapore’s Nanyang Technology University to establish a real-world mobility testing lab on the NTU campus to accelerate vehicle-to-everything (VTX) communication.

Leave a Reply

(Note: This name will be displayed publicly)