The Week In Review: Design/IoT

Synopsys v. ATopTech; verification and photonics tool updates; foundry certification.



A federal court jury favored Synopsys in a 2013 lawsuit alleging that ATopTech violated copyright by copying elements of the command set for Synopsys’ PrimeTime static timing analysis product. Synopsys was awarded $30.4 million in damages. ATopTech plans to contest the verdict, stating that other issues in the case remain to be decided.


Aldec unveiled the latest version of its Riviera-PRO verification platform, notably adding performance improvements for random constraints with expressions containing the division operator (/) or linear equations, and a debugging tool to list the design units from multiple simulation dataset.

An array of Mentor tools were optimized for Samsung Foundry’s 10nm FinFET process, including Calibre physical verification suite, Analog FastSPICE platform, Olympus-SoC digital design platform and Tessent test product suite.

Synopsys updated its photonic component design suite, improving design flows for modeling optical surface scattering properties in nanotechnology applications. The company’s software for designing illumination optics and automotive exterior lighting also saw new versions.

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