Soitec COO Paul Boudre discusses what will be the best solution for 20nm – fully depleted silicon on insulator or bulk 3D transistors? The answer will likely include both.
Paul Boudre, COO of Soitec, talks with Semiconductor Manufacturing & Design about why SOI has suddenly become so interesting in semiconductor manufacturing and how it will affect the move to FinFETs.
Suppliers are investing new 300mm capacity, but it’s probably not enough. And despite burgeoning 200mm demand, only Okmetic and new players in China are adding capacity.
Different interconnect standards and packaging options being readied for mass chiplet adoption.
Continued expansion in new and existing markets points to massive and sustained growth.
Experts at the Table: Designing for context, and geopolitical impacts on a global supply chain.
Funding rolls in for photonics and batteries; 88 startups raise $1.3B.
Interest in this particular ISA is expanding, but the growth of other open-source hardware is less certain.
Nanosheets are likeliest option throughout this decade, with CFETs and other exotic structures possible after that.
Hybrid bonding opens up whole new level of performance in packaging, but it’s not the only improvement.
Suppliers are investing new 300mm capacity, but it’s probably not enough. And despite burgeoning 200mm demand, only Okmetic and new players in China are adding capacity.
Why this is becoming a bigger issue, and what can be done to mitigate the effects.
From low resistance vias to buried power rails, it takes multiple strategies to usher in 2nm chips.
Manufacturing 3D structures will require atomic-level control of what’s removed and what stays on a wafer.
Disaggregation and the wind-down of Moore’s Law have changed everything.
Leave a Reply