TLM 2.0: Necessary for Co-Simulation

All IP needs to be compliant with the SystemC standard or it cannot be simulated at advanced process nodes.


By Ann Steffora Mutschler
Transaction-level modeling – an abstracted representation of design IP above the RT level — continues to grow in importance for architectural exploration, performance analysis, building virtual platforms for software development, and functional verification. The TLM-2.0 standard is the current industry standard for creating interoperable transaction-level models and supports loosely-timed and approximately-timed transaction-level modeling.

Will this remain to be necessary over time? Current industry consensus says it will.

Simply put, all models of IP need to be TLM-compliant because otherwise you can’t simulate it, said Frank Schirrmeister, director of product marketing for system-level solutions at Synopsys.
“SystemC is the set of class libraries with a reference simulator. At the end of the day, you need to agree on a certain subset to make sure things are interoperable and can be co-simulated.”

In general, there are many benefits to creating TLMs for design IP, mainly by creating a model that can run orders of magnitude faster than RTL and still represent the functional behavior and even the key timing and power attributes of the corresponding RTL block.

TLMs allow several key electronic system level (ESL) use models including optimizing the architecture of the design for area performance and power (known as architectural exploration), validating, debugging and optimizing software against an early model of the hardware (known as virtual prototyping), using the TLM as a single source for high-level synthesis (exploring various RTL implementations), and using TLMs as reference models in downstream RTL verification flows. Therefore, creating a TLM for each IP is quickly becoming a ‘must have’ to reap the above benefits, explained Shabtay Matalon, market development manager for the design creation and synthesis division at Mentor Graphics.

Ran Avinun, marketing group director for the system design and verification segment at Cadence Design Systems agrees that IP models in the future will need to be TLM-2.0 compliant whether it is a processor model or otherwise. “If you look at processor models, most are created today in C/C++ and then there is a TLM wrapper being added on top of those. Unless someone would come with a new way to do it, that’s probably going to be the approach moving forward, probably based on some limitations of the TLM language or structure,” he said.

As with all standards efforts, TLM has come under fire. The key drawbacks of TLMs in the past were the lack of interoperability and reusability standards, and a lack of sufficient performance, observed Matalon.

“The TLM-1.0 standard fell short on interoperability and did not deliver the expected simulation boost. These shortcomings were recognized by the Open SystemC Initiative (OSCI) standards body and have been addressed by TLM-2.0. TLM-2.0 establishes the infrastructure for ESL design across the industry and provides common reuse and interoperability standard among IP, semiconductor, and system companies,” he said.

When it comes to building TLMs based on the TLM-2.0 industry standard, one recognized downside is the effort needed to build the TLMs (including the initial learning curve in SystemC/TLM-2.0 language and methodology), but Matalon was quick to add this can quickly be mitigated by the benefits of each of the use models described above.

Another drawback is building different TLMs for each use model, he said. “This drawback can be mitigated by using a single TLM that supports all use models by using the TLM-2.0 scalable modeling methodology. And last, creating a library of TLMs by various IP providers and EDA vendors and users in open source, enables quick adoption and assembly of TLM based platforms by end users,” he continued.

Schirrmeister reiterated there really is no downside except that you have to follow a standard and can’t use proprietary APIs. “One of the early criticisms of TLM was that you won’t get the speed you need, but that has changed and people have benchmarked it. Speed degradation is in the single-digit domain. We have seen less than 5% speed degradation compared to the proprietary methods. It’s really negligible. The upside you get from simulation and interoperability is well outweighing the speed degradation.”

In the end, the benefits of using TLMs in ESL combined with better tools and methodologies surpass the drawbacks in modeling investment. Moving forward, most agree it will be very difficult for any vendor of RTL design IP to stay competitive without providing a TLM-2.0 compliant TLM for the IP.