Rising complexity adds more pressure to solve verification issues once and for all.
For all the talk about VMM vs. OVM and how it doesn’t matter…well, apparently it does.
It’s not that one verification environment is so much better than the other. That’s like saying one religion is better than another. People kill each other over those kinds of statements. And the truth is, there are plenty of people who will argue for and against each side.
Strangely, when you really dig into this, you’ll more than likely never get a straight answer because most people don’t know both methodologies. They learn one and that’s complicated enough for most mere mortals.
But complexity is getting to the point even at the most mainstream process nodes where verification headaches are becoming overwhelming. More transistors, multiple cores, multiple power islands and various on, off, and sleep states makes the need for better verification methodologies, languages, and base classes almost essential for debugging these designs. And it doesn’t help when there are different people in an organization with expertise in different methodologies.
There has been talk about bridging the two environments, matching data types or wrapping code. But so far, there has been little progress in this arena and the time needed to verify increasingly complex designs grows accordingly. Where are those corner bugs hiding? You’d prefer not to find out after a product is already out in the market.
It’s time this issue came out in the open instead of being stuck in standards groups. In the past, who used what verification methodology didn’t really matter. But it matters now, and the verification problem is only going to get worse.
What do you think?
–Ed Sperling
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