Week 26: A Surge For Embedded At DAC

We’ve reached the halfway mark to DAC. Deadlines are closing fast for the IP and Designer track submissions.

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A few weeks ago I told you about the best kept secret at DAC—the fact that about 30% of our content at DAC is focused on embedded systems and software. This came as a surprise to a lot people and shortly afterwards we were contacted by Rich Nass who is the executive vice president and brand manager of embedded computing design at Open Systems Media and the former editorial director for ESC – the Embedded Systems Conference. Everybody familiar with embedded knows Rich. He was, after all, the face and brain for the most successful embedded event in the United States.

Rich’s call led to some great news I’m happy to relay here: Open Systems Media is launching a co-located event at DAC. It will be a two-day event that coincides with DAC featuring technical, hands-on educational sessions. The event will be called Embedded TechCon and will seamlessly extend Open Systems Media’s existing online program, Embedded University. And Rich himself, the former content guru for embedded systems conference during its most successful years, will manage and produce the event.

As is true for all other collocated events at DAC, Embedded TechCon attendees will have access to our general session, including keynotes, the exhibit floor and the SKY Talks in the DAC pavilion. This is super exciting as it is the first ever collocated event for embedded at DAC. It will allow us to extend our reach into the embedded community and I can’t imagine a more complimentary program to attract more embedded designers and software developers to DAC.

And while we are talking about collocated events, we had a conference call this week to review all the proposals for DAC workshops and collocated events. Needless to say, Ramond (Ray) Rodriguez, our chair for tutorials and collocated events, has been busy.

Ray is an EDA Supplier Manager in Intel’s Design & Technology Solutions, Business & Technology Programs. Prior to joining Intel, he was an ASIC designer in Xerox’s Corporate Research & Technology group designing ICs for image enhancement, color and anti-counterfeit detection imaging products. Ramond joined Intel in 2000, managing RTL to GDS DA and Front End Design Implementation DA teams, where he was responsible for defining tools and methodologies for SoC implementation, physical verification and timing flows. Ramond also published papers at Intel on SoC methodologies and implementations flows. He then moved to DTS BTP, where he manages EDA supplier engagements, assessments, and strategies from a technical perspective and chairs the Design Automation Conference Planning Committee for Intel. His areas of expertise are design methodologies and environments for logic design, verification, low power and physical design. Ray has 2 U.S. patents and 1 European patent on methods and apparatus for decompression techniques. He holds a B.S. in Electrical Engineering from UCLA and an Executive MBA from Arizona State. Ray’s 15-month-old daughter keeps him busy when he is not at his day job or focusing on DAC planning activities.

We are halfway to DAC, so let’s take stock of where we are in terms of important dates: Deadlines for research papers, panels, special sessions, tutorials, workshops and collocated events have passed. Submissions in general increased from last year – surely because I keep bugging you constantly, right?! Speaking of which, the submissions for the IP and Designer Track will be accepted until Jan. 20. There’s time, yes, but better to get started on your proposal right away and submit it. It’s no secret that the early bird catches the worm.