Week In Review: Design, Low Power

ML for formal; energy harvesting predictions; test pioneer honored.


Synopsys unveiled a new formal app, Regression Mode Accelerator, which uses machine learning algorithms to speed up formal property verification, as well as better convergence of formal proofs for subsequent runs. According to Synopsys, the app also allows for significant saving of compute resources in nightly regressions.

Hitachi used OneSpin Solutions’ 360 EC product family to verify vCOSS S-zero, a functional safety controller for industrial facilities. Hitachi also used the tools to certify its measures for fault avoidance at the highest Safety Integrity Level (SIL 4) according to the IEC 61508 standard.

Infineon renewed a patent license agreement with Rambus for its Differential Power Analysis (DPA) Countermeasure portfolio, extending the agreement by ten years.

Cadence’s full-flow digital tool was certified for GlobalFoundries’ 22FDX process technology. Certification was completed using the Tensilica Fusion F1 DSP.

The number of devices with an energy harvesting solution will grow at a CAGR of 30% to 509 million units by 2022, while the semiconductor content for energy harvesting solutions will grow to $3.4 billion by 2022, according to Semico Research. In 2017, there were 8 million consumer devices utilizing energy harvesting.

Thomas W. Williams, former senior technical staff member at IBM and Synopsys’ chief scientist and fellow, has been selected as the recipient of the 2018 Phil Kaufman Award. Williams is known for the seminal paper co-authored with Ed Eichelberger describing Level Sensitive Scan Design (LSSD). “His contributions and tireless evangelizing throughout the industry have had immense impact, as all significant digital chips today use derivatives of his work,” said Aart de Geus, co-CEO of Synopsys. Williams has been widely praised for his work advancing design for testability across the industry. The award ceremony will be held Nov. 7 from 6 p.m. until 9 p.m. in San Jose, CA.

Crossing the Chasm: Building a Startup to a Successful Exit: Sept. 13, 6 p.m. – 9 p.m., at SEMI in Milpitas, CA. Jim Hogan of Vista Ventures and Amit Gupta, co-founder of Solido Design Automation, will discuss the experience of growing Solido from an EDA startup through its acquisition by Mentor, a Siemens Business, in 2017.

Electronic Design Process Symposium (EDPS): Sept. 13-14 at SEMI in Milpitas, CA. The meeting will discuss design methodologies, design flows and CAD tool needs. Focus areas include machine learning, smart manufacturing, reliability, and cybersecurity.

AI Hardware Summit: Sept. 18-19 in Mountain View, CA. Focused on the development of hardware accelerators for neural networks and computer vision, the conference features talks from AI chip startups to well-established companies.

Digital Marketing Workshop 2.0: Oct. 3, 6 p.m. – 8:30 p.m. in Milpitas, CA. A workshop focused on three organizational shifts that are key to mastering digitally-driven marketing and sales and conducting marketing in an agile manner.

Arm TechCon: Oct. 16-18 in San Jose, CA. The Arm-centric conference and expo will feature keynotes by senior Arm executives as well as best-practices for implementing Arm IP in a range of designs, including IoT and automotive. The company has also teased an expanded roadmap for future products to be released at the show.

RISC-V Summit: Dec. 3-6 in Santa Clara, CA. The first annual conference and exhibition dedicated to the RSIC-V ISA ecosystem. Training sessions, workshops, and presentations will be available, followed by a day for Foundation members.

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