At the leading edge of design, business and technology are converging in unexpected ways.
The economics of engineering chips are changing again.
We’ve been hearing for several process nodes about runaway non-recurring engineering costs and the rising costs of masks and how Moore’s Law would meet an abrupt end because no one could afford to stay the course. And while it’s true that not everyone did stay the course, the solution has turned out less onerous than many predicted because of derivative chips, skipping nodes and better design for manufacturability tools.
Those are business decisions, of course, and the convergence of business and technology at the leading edge of design has been obvious since 130nm. In fact, business decisions are now as creative and well-thought-out as many technology advances. Restrictive design rules are largely business decisions, too, although this time dictated by the foundries, while high k/metal gate technology is a technology that enables many of those business decisions.
Modeling of hardware and power is both. It solves many technology problems by raising the level of abstraction, but it also requires a leap of faith from the technology and the business—arguably the first such technology to ever do that. In the past, either the chip design side of the house or the business folks needed to see concrete results before they invested time or money—or both. In this case, they both have to buy into the concept, and that’s something of a quiet revolution in chip design.
But modeling does have one great advantage—the alternative is uglier than taking a big gulp and hoping for the best. Adding more re-spins, boosting NRE costs and ultimately missing market windows are unthinkable, and with complex SoCs at the leading edge of design, that may be the alternative.
–Ed Sperling
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