November 2011 - Page 3 of 4 - Semiconductor Engineering

A view from the top (20)
By Chris Mack - 08 Nov, 2011 - Comments: 0

It is an article of faith among semiconductor industry watchers that the last 20 years have seen considerable consolidation among semiconductor makers, with further consolidation all but inevitable. Of course, we can all point to mergers (TI and National being the latest) and players exiting from the market (NEC was the #1 chipmaker in the world in 1991, but now is out of the business). But d... » read more

Experts At The Table: Improving Yield
By Ed Sperling - 07 Nov, 2011 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down to discuss yield issues with Sesh Ramaswami, senior director of strategy at Applied Materials; Luigi Capodieci, R&D fellow at GlobalFoundries; Kimon Michaels, vice president and DFM director at PDF Solutions; Mike Smayling, senior vice president at Tela Innovations; and Mark Mason, director of data integration at Texas Instr... » read more

CMP, ST et al offer 28nm FD-SOI for prototyping, research
By Various Writers - 06 Nov, 2011 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ What would a port to 28nm FD-SOI do for your design?  A recent announcement by CMP, STMicroelectronics and Soitec invites you to find out.  Specifically, ST’s CMOS 28nm Fully Depleted Silicon-On-Insulator (FD-SOI) process – which uses innovative silicon substrates from Soitec and incorporates robust, compact model... » read more

Technologies For Power, Signal, Thermal And EMI Sign-off For Chip-Package-PCB Designs
By Various Writers - 03 Nov, 2011 - Comments: 0

Over the past few years, there has been a marked shift in the way people communicate and use computers. Some of the key changes include the prevalence of mobile internet connected devices such as smartphones and netbooks, the shift to cloud computing using larger centralized data centers, and the increase of electronics in automobiles for guidance, infotainment, and safety control systems. The ... » read more

Five Important Changes That Will Affect Power
By Ed Sperling - 03 Nov, 2011 - Comments: 0

By Ed Sperling So far most of the energy savings in SoCs have been achieved using two main approaches—turning off most of the chip most of the time, and changing the materials used to insulate against current leakage. Over the next few years, changes to designs will be more radical, encompass more pieces of a bigger system, and they will be orders of magnitude more effective. From a marke... » read more

EMI Cuts A Wide Swath
By Ed Sperling - 03 Nov, 2011 - Comments: 0

By Ann Steffora Mutschler Electromagnetic interference (EMI) cuts across all application segments, whether it’s aerospace and defense and its various tangents, or in a handset, virtually touching a large majority of engineering teams today. The reason this issue affects so many engineering groups is because as modulation schemes become ever more complex they become even more sensitive to ... » read more

Energy Vs. Power
By Ed Sperling - 03 Nov, 2011 - Comments: 0

By Ann Steffora Mutschler In the quest to optimize an SoC for both power and energy efficiency many variables come into play. Target application, use cases, processor choice and amount of memory among other specifications all figure into the optimization equation. As discussed in Part 1 of this series, energy and power are different entities and must be understood distinctly from each other... » read more

Power Gating And Power-Centric Programing
By Ed Sperling - 03 Nov, 2011 - Comments: 0

By Pallab Chatterjee SoC design has a number of techniques for power management. One of the more prevalent methods is to use power gating to turn on and off blocks based on applications being run, and mode controls. Power gating while being supported by the two major EDA power design flows, UPF and CPF, still has some implementation challenges. The flows have to make sure that the states of... » read more

Power Intent Formats: Isolation
By Luke Lang - 03 Nov, 2011 - Comments: 0

By Luke Lang Last month, I discussed power domain for all three power formats: CPF, UPF 1.0, and IEEE 1801. I mentioned isolation but mainly used it to explain power domain. This month’s blog will address isolation in detail. First, isolation cells are required at off-to-on domain crossings. When a domain is shut off, all of its output nets become undriven. If these floating nets drive direct... » read more

Innovation At The Core
By Barry Pangrle - 03 Nov, 2011 - Comments: 0

By Barry Pangrle A number of next-generation ARM-based multi-core systems are starting to show up in the press. Nvidia has released information on its upcoming Tegra 3 (also known as “Kal El”). At last week’s ARM Techcon in Santa Clara, ARM gave several presentations around its Cortex-A7 (Kingfisher) and Cortex-A15 (Eagle) architectures and collectively about its big.LITTLE strategy. Qua... » read more

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