Technologies For Power, Signal, Thermal And EMI Sign-off For Chip-Package-PCB Designs

A look at the challenges associated with designing smaller, faster, and lower cost products and the necessity for an analysis methodology that addresses the cross domain effect in today’s advanced process designs.


Over the past few years, there has been a marked shift in the way people communicate and use computers. Some of the key changes include the prevalence of mobile internet connected devices such as smartphones and netbooks, the shift to cloud computing using larger centralized data centers, and the increase of electronics in automobiles for guidance, infotainment, and safety control systems. The shift has changed the requirements for electronic system designs with an increased focus on “power efficient” computing. Handheld devices running multiple applications (or apps) need high speed processors that consume extremely low levels of power in both operational and standby modes. Processors used in servers must deliver performance that is measured on a per watt basis. Devices are now marketed touting energy efficiency, both in the hand-held computing and high performance computing arenas. In addition to the stringent requirements on power, electronic systems are now subject to regulatory and design requirements such as EMI emission guidelines and ESD tests.

The challenges that system-on-chip (SoC) designers face include delivering electronic systems that not only provide the required performance and meet all specifications and tests, but that also is done with the least possible cost. Solutions to these challenges address concerns related to the size (or form factor) of the system, its overall price (or cost factor), and its operational speed (or performance factor). Form factor is the maximum amount of functionality that can be squeezed out of the design, while still meeting other requirements. Performance factor establishes the requirement for high frequency, both on the chip and the I/O interfaces. Cost factor defines the requirement to design and manufacture electronic systems with a “reduced cost” mind-set, such as using the least amount of silicon area, or the minimum number of package planes, or the optimal amount of decoupling capacitance.

An optimal solution to these seemingly conflicting design requirements demands a re- examination of the traditional domain-specific design implementation and design validation methodology to discover a new methodology that is more inclusive in scope and multi-physics in nature. This white paper outlines the need and requirements for such solutions. It then introduces the technologies that are available from Apache Design Solutions to address these challenges. To download this white paper, click here.