December 2011 - Page 3 of 4 - Semiconductor Engineering


Experts At The Table: Stacked Die And The Supply Chain


By Ed Sperling Semiconductor Manufacturing & Design sat down to discuss the effects of stacking die on the supply chain with Stephen Pateras, production marketing director for silicon test at Mentor Graphics; Javier DeLaCruz, director of manufacturing technology at eSilicon; Colin Baldwin, director of marketing at Open-Silicon; Charles Woychik, director of marketing and technical analysis ... » read more

Power Intent Formats


The October blog about CPF, UPF 1.0, and IEEE 1801 power domain definitions resulted in some reader feedback and suggestions. Several points are worthy of further discussion and clarification. Let me start with the toughest questions. What is my motivation behind the blog? Am I trying to make CPF look better than UPF/IEEE 1801? My preferred choice of power intent should not be a surprise ... » read more

Power Delivery Networks


By Preeti Gupta That power is now at the forefront of semiconductor design is no secret. It is also true that lowering power consumption drives product competitiveness and green technology—even more so in today’s mobile-driven market. But the same drive for lower power also increases the complexity of ensuring the power integrity of a system-on-chip (SoC). The power delivery network (PD... » read more

Energy Vs. Power: Energy, Power Optimization Is A System-Level Challenge


By Ann Steffora Mutschler Power issues today, whether they are related to low power in a smart phone or highly efficient power for data center applications, are so pervasive that they touch the entire design team—and must be carefully prioritized at the system or architectural level. As discussed in Part 1 of this series, energy and power are different entities and must be understood dist... » read more

Why Batteries Don’t Last Long Enough


By Pallab Chatterjee While there have been great strides in process scaling for power reduction on a per-gate level for mobile devices, a large part of the power is still consumed by the power amplifier, filter and analog mux arrangement from the systems. Most of the logic systems have benefited from scaling to the sub-40nm technology range, which reduces standby and operating power by seve... » read more

Cell Phone Radiation: Taboo Topic, Interesting Science


Amid a growing consumer concern for possible health issues associated with radiation, more attention is being paid to what’s being generated by mobile devices—particularly the ones we hold next to our brains. Legislation has been introduced in some parts of the country, with varying success, aimed mainly at informing consumers about the potential risks and giving suggestions for reducing ex... » read more

AMS Challenges Growing


By David Lammers Analog and mixed signal (MS) devices will play an ever-increasing role in saving energy, particularly as the “Internet of Things” expands to about 10 billion units per year over the next decade. But as leading-edge design rules scale to 28nm and below, enhanced with high-k/metal gate technologies, it is becoming increasingly challenging to integrate AMS devices on SoCs. ... » read more

Speed Demons


By Barry Pangrle For extreme world record performance levels, the required power levels are also typically extreme. It’s that age-old battle against diminishing returns to squeeze out every last drop of performance versus practical limits and wallets. For example, a top fuel dragster can consume about six gallons of fuel for a quarter-mile run down the strip. As has previously been shown ... » read more

3D DRAM Makers Inch Closer To Production


By Mark LaPedus For some time, DRAM makers have been developing 3D memory chips, but commercial products still are not due out for some time because of technical and cost issues. But the advent of the 3D DRAM era could be near the turning point, as two memory rivals have separately moved to bring their respective technologies closer to production. In one move, Micron Technology Inc. has di... » read more

The Power Of Analog


The shift into stacked die, expected to begin late next year with a big ramp in 2013, will shine a spotlight on analog design and its effect on power. For years, analog engineers have bragged about just how efficient their portion of a chip was versus digital. We’re about to find out if they’re right. Stacking die will, to a much greater extent, decouple analog from digital and leave it ... » read more

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