January 2016 - Page 4 of 10 - Semiconductor Engineering

Coming To A Fab Near You?
By Katherine Derbyshire - 21 Jan, 2016 - Comments: 1

What do Quentin Tarantino and ASML have in common? Anamorphic lenses. The optical image created by an anamorphic lens is oval, rather than round, with different magnifications along the horizontal and vertical axes. Tarantino used 65mm anamorphic lenses to film The Hateful Eight, and some theaters are also using them to screen the movie. It’s the first fiction feature to use this format s... » read more

Automated Power Model Verification For Analog IPs
By Sierene Aymen - 21 Jan, 2016 - Comments: 0

By Sierene Aymen and Hartmut Marquardt Creating macro power models for analog intellectual property (IP) blocks is essential to enable the chip assembly group to effectively integrate these blocks within their place and route environment. These macro models, which define power domains, identify IP ports as signal, power, ground, or trivial ports, and describe the associations of signal pins ... » read more

Hello, It’s Your Pet Calling
By Jim Feldhan - 21 Jan, 2016 - Comments: 0

As we entered into the new year of 2016 with the worldwide economic cloud of uncertainty hovering like an unregistered drone—particularly in China—CES was still setting records. Bustling with more than 170,000 attendees and more than 3,600 companies displaying their new products, the event was as hectic as ever. There was a big showing from all the major automotive manufacturers and supp... » read more

Display Landscape Heats Up At CES 2016
By Max McDaniel - 21 Jan, 2016 - Comments: 0

I was one of the 170,000+ people who attended the 2016 Consumer Electronics Show in Las Vegas earlier this month and thought I’d share some observations; first, about the consumer technologies on exhibit, and second, about the topic closest to my heart, displays. To learn what technologies were trending, you don’t need to look any further than Intel CEO Brian Krzanich's keynote speech. ... » read more

Predictions For 2016: Semiconductors, Manufacturing And Design
By Brian Bailey - 21 Jan, 2016 - Comments: 0

Seventeen companies sent in their predictions for this year with some of them sending predictions from several people. This is in addition to the CEO predictions that were recently published. That is a fine crop of views for the coming year, especially since they know that they will be held accountable for their views and this year, just like the last, they will have to answer for them. We beli... » read more

Overview Of Atomic Layer Etching In The Semiconductor Industry
By Lam Research - 21 Jan, 2016 - Comments: 0

Atomic layer etching (ALE) is a technique for removing thin layers of material using sequential reaction steps that are self-limiting. ALE has been studied in the laboratory for more than 25 years. Today, it is being driven by the semiconductor industry as an alternative to continuous etching and is viewed as an essential counterpart to atomic layer deposition. As we enter the era of atomic-sca... » read more

Inside AI And Deep Learning
By Mark LaPedus - 21 Jan, 2016 - Comments: 0

Semiconductor Engineering sat down to talk with Dave Schubmehl, research director for content analytics, discovery and cognitive systems at International Data Corp. (IDC), a market research firm. Schubmehl’s research covers information access, artificial intelligence, cognitive computing, deep learning, machine learning and other topics. He also addressed neuromorphic technology. What follows... » read more

Obama Delivers Unique State-of-the-Union Speech
By SEMI - 21 Jan, 2016 - Comments: 0

By Jamie Girard On Jan. 12, President Obama delivered his eighth and final State of the Union Address to the nation. The speech is closely watch by many to signal the intent of the commander-in-chief for the coming year, but this time President Obama broke from tradition in focusing grander themes rather that specific programs. While it was decidedly a different approach to the normal laundr... » read more

Tech Talk: Double-Triple Patterning
By Brian Bailey - 21 Jan, 2016 - Comments: 0

Mentor Graphics' David Abercrombie shows the differences and challenges in double patterning versus triple patterning. [youtube vid= e0wZmjBbEf0] » read more

The Future of Package Design Verification: Assembly Design Kits
By Mentor, a Siemens Business - 20 Jan, 2016 - Comments: 0

Chip design companies and package assembly houses have no unified signoff verification process to ensure that an IC package meets manufacturability and performance requirements. Packages need a process that confirms the disparate products they contain can be manufactured within a single package. Mentor Graphics collaborated with Qualcomm and STATS ChipPAC to develop a prototype assembly design ... » read more

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