March 2017 - Page 3 of 11 - Semiconductor Engineering


What Is Portable Stimulus?


When [getentity id="22028" e_name="Accellera"] first formed the [getentity id="22863" comment="Portable Stimulus Working Group”] and gave it that name, I was highly concerned. I expressed my frustration that the name, while fitting with what most people thought [getkc id="10" kc_name="verification"] is about, does not reflect the true nature of the standard being worked on. In short, it is no... » read more

Leveraging The Power Of VDMA Engines For Computer Vision Apps


It's pretty hard to overestimate the role of heterogeneous embedded systems based on Xilinx Zynq-7000 All-Programmable devices in tasks like computer vision. Many consumer electronics and specialized devices are emerging to facilitate and improve industries such as medical, automotive, security, and IoT. The combination of high-performance ARM application processing and Xilinx programmable F... » read more

10 Ways To Skin A Formal Puzzle


During the holidays, OneSpin issued a challenge to solve the classic Einstein’s Riddle using any formal verification tool. Although this puzzle was meant to be a little holiday fun, its solution required thought and some useful formal techniques applicable in everyday functional verification. We received a broad range of answers from engineers across the globe in different companies, inclu... » read more

Challenges Grow For IP Reuse


As chip complexity increases, so does the complexity of IP blocks being developed for those designs. That is making it much more difficult to re-use IP from one design to the next, or even to integrate new IP into an SoC. What is changing is the perception that standard [getkc id="43" kc_name="IP"] works the same in every design. Moreover, well-developed [getkc id="100" kc_name="methodologie... » read more

IoT Edge Design Demands A New Approach


A new breed of designers has arrived that is leveraging the advances in sensing technology to build the intelligent systems at the edge of the IoT. These systems play in every space: on your body, at home, the car or bus that you take to work, and the cities, factories, office buildings, or farms that you work. The energy that you consume and how you travel, by air, land, or sea, all have IoT e... » read more

Users Talk Back On Standards Process


One of the major themes of DVCon this year was the standard that currently goes by the name of Portable Stimulus (see related story, Portable Stimulus – The Name Must Change). It is not ready for prime time yet, but there was plenty to hear and learn about the emerging standard, including what users think about it and the standardization process. The panel gave the users the opportunity to vo... » read more

Ubiquitous AI


We have witnessed an amazing expansion of compute power over the past four years. Go inside the numbers of the recent 100 billion ARM-based chips milestone and you will see that 50 billion were shipped by our partners from 2013 to 2017, which demonstrates the industry’s insatiable demand for more compute. Even more extraordinary is that we expect our partners to ship the next 100 billion ARM-... » read more

The CEO Outlook Returns


One of the more popular events hosted by the EDA Consortium (EDAC, to those in the know) was the CEO Forecast held at the start of each year. It was phased out several years ago for a number of reasons, including logistics and scheduling. Attendance was never one of them. As I took the reins of EDAC two years ago, I repeatedly heard how much that evening was missed. Members and non-members h... » read more

Carving Up Verification


Anirudh Devgan, executive vice president and general manager of [getentity id="22032" e_name="Cadence's"] System & Verification Group, sat down with Semiconductor Engineering to discuss the evolution of verification. What follows are excerpts of that conversation. SE: What’s changing in [getkc id="10" kc_name="verification"]? Devgan: Parallelism, greater capacity and multiple engine... » read more

VCS Fine-Grained Parallelism Simulation Performance Technology


Learn how fine-grained parallelism simulation technology enables delivery of breakthrough parallel simulation performance improvement needed to reduce turn-around time for critical-path tests. » read more

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